參數(shù)資料
型號(hào): ADSP-2196MBCA-140X
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號(hào)處理
英文描述: DSP Microcomputer
中文描述: 16-BIT, 160 MHz, OTHER DSP, PBGA144
封裝: MINI, BGA-144
文件頁(yè)數(shù): 30/68頁(yè)
文件大?。?/td> 897K
代理商: ADSP-2196MBCA-140X
For current information contact Analog Devices at 800/262-5643
ADSP-2196
September 2001
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
30
REV. PrA
External Port Read Cycle Timing
Table 12
and
Figure 15
describe external port read operations. For additional information on the ACK signal, see the
discussion on
on page 28
.
Table 12. External Port Read Cycle Timing
Parameter
Description
1, 2, 3
1
t
HCLK
is the peripheral clock period.
2
These are preliminary timing parameters that are based on worst-case operating conditions.
3
The pad loads for these timing parameters are 20 pF.
4
EMI clock is the external port clock that is generated from the EMI clock ratio. This signal is not available on an external pin, but (roughly) corresponds
to HCLK (at similar clock ratios).
Min
Max
Unit
Switching Characteristics
t
CRA
EMI
4
clock low to RD asserted delay
2.8
ns
t
CSRS
Chip select asserted to RD asserted delay
4.3
6.5
ns
t
ARS
Address valid to RD setup and delay
4.9
7.0
ns
t
AKS
ACK asserted to EMI clock high delay
6.0
ns
t
CRD
EMI clock low to RD de-asserted delay
2.5
2.7
ns
t
RSCS
RD de-asserted to chip select de-asserted setup
4.8
7.0
ns
t
RW
RD strobe pulsewidth
t
HCLK
–0.5
ns
t
RSA
RD de-asserted to address invalid setup
4.5
6.6
ns
Timing Requirements
t
AKW
ACK strobe pulsewidth
10.0
ns
t
CDA
RD to data enable access delay
0.0
ns
t
RDA
RD asserted to data access setup
t
HCLK
–5.5
ns
t
ADA
Address valid to data access setup
t
HCLK
–0.2
ns
t
SDA
Chip select asserted to data access setup
t
HCLK
–0.6
ns
t
SD
Data valid to RD de-asserted setup
1.8
ns
t
HRD
RD de-asserted to data invalid hold
0.0
ns
相關(guān)PDF資料
PDF描述
ADSP-2196MBST-140X DSP Microcomputer
ADSP-2196MKCA-160X DSP Microcomputer
ADSP-2196MKST-160X DSP Microcomputer
ADSP-21990 16-bit fixed point DSP with Flash
ADSP-21990BBC 16-bit fixed point DSP with Flash
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
adsp-2196mbst-140 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 140MHz 140MIPS 144-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:
ADSP-2196MBST-140Z 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 140MHz 140MIPS 144-Pin LQFP
ADSP-2196MKST-160 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 160MHz 160MIPS 144-Pin LQFP 制造商:Analog Devices 功能描述:16-Bit DSP 160 MIPs 2.5V 40 Kbytes
ADSP-2196MKSTZ-160 功能描述:IC DSP CONTROLLER 16BIT 144-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號(hào)處理器) 系列:ADSP-21xx 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C,McASP,McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA(27x27) 包裝:托盤(pán) 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
ADSP-21990BBC 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 150MHz 150MIPS 196-Pin Mini-BGA 制造商:Rochester Electronics LLC 功能描述:160 MIPS, MIXED SIGNAL DSPWITH 14-BIT - Bulk