參數(shù)資料
型號: ADSP-2188NBCA-320
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號處理
英文描述: Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection
中文描述: 24-BIT, 40 MHz, OTHER DSP, PBGA144
封裝: MO-205AC, BGA-144
文件頁數(shù): 23/48頁
文件大?。?/td> 1571K
代理商: ADSP-2188NBCA-320
–23–
REV. 0
ADSP-218xN Series
ESD SENSITIVITY
Power Dissipation
To determine total power dissipation in a specific applica-
tion, the following equation should be applied for each
output:
C
V
DD
2
f
where:
C
= load capacitance,
f
= output switching frequency.
Example:
In an application where external data memory
is used and no other outputs are active, power dissipation is
calculated as follows:
Assumptions:
External data memory is accessed every cycle with 50%
of the address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
Application operates at V
DDEXT
= 3.3 V and t
CK
= 30 ns.
Total Power Dissipation = P
INT
+ (
C
V
DDEXT
2
f)
P
INT
= internal power dissipation from
Figure 20 on
page 26
.
(C
V
DDEXT
2
f)
is calculated for each output, as in the
example in
Table 13
.
Total power dissipation for this example is
P
INT
+ 45.72 mW.
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V
readily accumulate on the human body and test equipment and can discharge without
detection. Although the ADSP-218xN features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high-energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid perfor-
mance degradation or loss of functionality.
CAUTION
Table 13. Example Power Dissipation Calculation
Parameters
# of Pins
× C (pF)
× V
DDEXT
2
(V)
3.3
2
3.3
2
3.3
2
3.3
2
× f (MHz)
PD (mW)
Address
Data Output, WR
RD
CLKOUT, DMS
7
9
1
2
10
10
10
10
20.0
20.0
20.0
40.0
15.25
19.59
2.18
8.70
45.72
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