參數(shù)資料
型號: ADSP-2186M
廠商: Analog Devices, Inc.
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection
中文描述: 無電容,NMOS管,150mA的低壓差穩(wěn)壓器的反向電流保護(hù)
文件頁數(shù): 12/40頁
文件大?。?/td> 288K
代理商: ADSP-2186M
REV. 0
–12–
ADSP-2186M
Active Configuration
Active Configuration involves the use of a three-statable external
driver connected to the Mode C pin. A driver’s output enable
should be connected to the DSP’s
RESET
signal such that it
only drives the PF2 pin when
RESET
is active (low). When
RESET
is deasserted, the driver should three-state, thus allow-
ing full use of the PF2 pin as either an input or output. To
minimize power consumption during power-down, configure
the programmable flag as an output when connected to a three-
stated buffer. This ensures that the pin will be held at a constant
level, and will not oscillate should the three-state driver’s level
hover around the logic switching point.
IACK
Configuration
Mode D = 0 and in host mode:
IACK
is an active, driven signal
and cannot be “wire OR’d.”
Mode D = 1 and in host mode:
IACK
is an open drain and
requires an external pull-down, but multiple
IACK
pins can be
“wire OR’d” together.
MEMORY ARCHITECTURE
The ADSP-2186M provides a variety of memory and peripheral
interface options. The key functional groups are Program Memory,
Data Memory, Byte Memory, and I/O. Refer to the following
figures and tables for PM and DM memory allocations in the
ADSP-2186M.
Program Memory
Program Memory (Full Memory Mode)
is a 24-bit-wide
space for storing both instruction opcodes and data. The ADSP-
2186M has 8K words of Program Memory RAM on chip, and
the capability of accessing up to two 8K external memory over-
lay spaces using the external data bus.
Program Memory (Host Mode)
allows access to all internal
memory. External overlay access is limited by a single external
address line (A0). External program execution is not available in
host mode due to a restricted data bus that is 16 bits wide only.
ACCESSIBLE WHEN
PMOVLAY = 0
0
x
0000
0
x
1FFF
2
EXTERNAL
MEMORY
0
x
0000
0
x
1FFF
2
RESERVED
ACCESSIBLE WHEN
PMOVLAY = 2
0
x
2000
0
x
3FFF
2
0
x
2000
0
x
3FFF
2
EXTERNAL
MEMORY
ACCESSIBLE WHEN
PMOVLAY = 1
PMOVLAY = 0
RESERVED
0x2000
0x3FFF
PM (MODE B = 0)
ALWAYS
ACCESSIBLE
AT ADDRESS
0x0000
0x1FFF
PM (MODE B = 1)
1
RESERVED
NOTES:
1
WHEN MODE B = 1, PMOVLAY MUST BE SET TO 0
2
SEE TABLE III FOR PMOVLAY BITS
RESERVED
0x2000
0x3FFF
0
x
3FFF
8K
INTERNAL
0
x
0000
8K EXTERNAL
PMOVLAY = 1, 2
0
x
1FFF
0
x
2000
PROGRAM MEMORY
MODE B = 0
ADDRESS
0
x
3FFF
8K EXTERNAL
PMOVLAY = 0
0
x
0000
RESERVED
0
x
1FFF
0
x
2000
PROGRAM MEMORY
MODE B = 1
ADDRESS
Figure 4. Program Memory
Table III. PMOVLAY Bits
PMOVLAY
Memory
A13
A12:0
0
1
2
Reserved
External Overlay 1
External Overlay 2
Not Applicable
0
1
Not Applicable
13 LSBs of Address Between 0x2000 and 0x3FFF
13 LSBs of Address Between 0x2000 and 0x3FFF
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