參數(shù)資料
型號： ADSP-2101BG-100
廠商： Analog Devices Inc
文件頁數(shù)： 7/64頁
文件大小： 0K
描述： IC DSP CONTROLLER 16BIT 68PGA
標(biāo)準(zhǔn)包裝： 1
系列： ADSP-21xx
類型： 定點(diǎn)
接口： 同步串行端口（SSP）
時鐘速率： 25MHz
非易失內(nèi)存： 外部
芯片上RAM： 6kB
電壓 - 輸入/輸出： 5.00V
電壓 - 核心： 5.00V
工作溫度： -40°C ~ 85°C
安裝類型： 通孔
封裝/外殼： 68-BEPGA
供應(yīng)商設(shè)備封裝： 68-PGA（27.89x27.89）
包裝： 托盤
ADSP-21xx
REV. B
–15–
Instruction Set
The ADSP-21xx assembly language uses an algebraic syntax for
ease of coding and readability. The sources and destinations of
computations and data movements are written explicitly in each
assembly statement, eliminating cryptic assembler mnemonics.
Every instruction assembles into a single 24-bit word and
executes in a single cycle. The instructions encompass a wide
variety of instruction types along with a high degree of
operational parallelism. There are five basic categories of
instructions: data move instructions, computational instruc-
tions, multifunction instructions, program flow control instruc-
tions and miscellaneous instructions. Multifunction instructions
perform one or two data moves and a computation.
The instruction set is summarized below. The ADSP-2100
Family Users Manual contains a complete reference to the
instruction set.
ALU Instructions
[IF cond]
AR|AF
=
xop + yop [+ C] ;
Add/Add with Carry
=
xop – yop [+ C– 1] ;
Subtract X – Y/Subtract X – Y with Borrow
=
yop – xop [+ C– 1] ;
Subtract Y – X/Subtract Y – X with Borrow
=
xop AND yop ;
AND
=
xop OR yop ;
OR
=
xop XOR yop ;
XOR
=
PASS xop ;
Pass, Clear
=
– xop ;
Negate
=
NOT xop ;
NOT
=
ABS xop ;
Absolute Value
=
yop + 1 ;
Increment
=
yop – 1 ;
Decrement
=
DIVS yop, xop ;
Divide
=
DIVQ xop ;
MAC Instructions
[IF cond]
MR|MF =
xop * yop ;
Multiply
=
MR + xop * yop ;
Multiply/Accumulate
=
MR – xop * yop ;
Multiply/Subtract
=
MR ;
Transfer MR
=0 ;
Clear
IF MV
SAT MR ;
Conditional MR Saturation
Shifter Instructions
[IF cond]
SR = [SR OR] ASHIFT xop ;
Arithmetic Shift
[IF cond]
SR = [SR OR] LSHIFT xop ;
Logical Shift
SR = [SR OR] ASHIFT xop BY <exp>;
Arithmetic Shift Immediate
SR = [SR OR] LSHIFT xop BY <exp>;
Logical Shift Immediate
[IF cond]
SE = EXP xop ;
Derive Exponent
[IF cond]
SB = EXPADJ xop ;
Block Exponent Adjust
[IF cond]
SR = [SR OR] NORM xop ;
Normalize
Data Move Instructions
reg = reg ;
Register-to-Register Move
reg = <data> ;
Load Register Immediate
reg = DM (<addr>) ;
Data Memory Read (Direct Address)
dreg = DM (Ix , My) ;
Data Memory Read (Indirect Address)
dreg = PM (Ix , My) ;
Program Memory Read (Indirect Address)
DM (<addr>) = reg ;
Data Memory Write (Direct Address)
DM (Ix , My) = dreg ;
Data Memory Write (Indirect Address)
PM (Ix , My) = dreg ;
Program Memory Write (Indirect Address)
Multifunction Instructions
<ALU>|<MAC>|<SHIFT> , dreg = dreg ;
Computation with Register-to-Register Move
<ALU>|<MAC>|<SHIFT> , dreg = DM (Ix , My) ;
Computation with Memory Read
<ALU>|<MAC>|<SHIFT> , dreg = PM (Ix , My) ;
Computation with Memory Read
DM (Ix , My) = dreg , <ALU>|<MAC>|<SHIFT> ;
Computation with Memory Write
PM (Ix , My) = dreg , <ALU>|<MAC>|<SHIFT> ;
Computation with Memory Write
dreg = DM (Ix , My) , dreg = PM (Ix , My) ;
Data & Program Memory Read
<ALU>|<MAC> , dreg = DM (Ix , My) , dreg = PM (Ix , My) ;
ALU/MAC with Data & Program Memory Read
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