參數(shù)資料
型號(hào): ADS802U
英文描述: 12-Bit, 10MHz Sampling ANALOG-TO-DIGITAL CONVERTER
中文描述: 12位,10MHz的采樣模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 3/13頁(yè)
文件大?。?/td> 283K
代理商: ADS802U
3
ADS802
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
Electrostatic discharge can cause damage ranging from
performance degradation to complete device failure. Burr-
Brown Corporation recommends that all integrated circuits be
handled and stored using appropriate ESD protection
methods.
ABSOLUTE MAXIMUM RATINGS
+V
S
....................................................................................................... +6V
Analog Input.............................................................. 0V to (+V
S
+ 300mV)
Logic Input ................................................................ 0V to (+V
S
+ 300mV)
Case Temperature ......................................................................... +100
°
C
Junction Temperature .................................................................... +150
°
C
Storage Temperature ..................................................................... +125
°
C
External Top Reference Voltage (REFT) .................................. +3.4V Max
External Bottom Reference Voltage (REFB).............................. +1.1V Min
NOTE: Stresses above these ratings may permanently damage the device.
PACKAGE
DRAWING
NUMBER
(1)
TEMPERATURE
RANGE
PRODUCT
PACKAGE
ADS802U
ADS802E
28-Lead SOIC
28-Lead SSOP
217
324
–40
°
C to +85
°
C
–40
°
C to +85
°
C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
ADS802U, E
PARAMETER
CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
SPECIFICATIONS
(CONT)
At T
A
= +25
°
C, V
S
= +5V, and Sampling Rate = 10MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.
OUTPUTS
Logic Family
Logic Coding
Logic Levels
TTL/HCT Compatible CMOS
SOB or BTC
Logic Selectable
Logic “LO”
Logic “HI”
Full
Full
Full
Full
0
0.4
+V
S
40
10
V
V
ns
ns
2.0
3-State Enable Time
3-State Disable Time
POWER SUPPLY REQUIREMENTS
Supply Voltage: +V
S
Supply Current: +I
S
20
2
Operating
Operating
Operating
Operating
Operating
Full
+25
°
C
Full
+25
°
C
Full
+4.75
+5.0
50
52
250
260
+5.25
62
62
310
310
V
mA
mA
mW
mW
Power Consumption
Thermal Resistance,
θ
JA
28-Lead SOIC
28-Lead SSOP
75
50
°
C/W
°
C/W
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