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參數(shù)資料
| 型號(hào)： | ADS801 |
| 英文描述： | 12-Bit, 25MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 12位，25MHz的采樣模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 9/13頁(yè) |
| 文件大小： | 279K |
| 代理商： | ADS801 |
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9
ADS801
FIGURE 2. Pipeline A/D Architecture.
FIGURE 1. Input Track/Hold Configuration with Timing
Signals.
THEORY OF OPERATION
The ADS801 is a high speed sampling analog-to-digital
converter with pipelining. It uses a fully differential archi-
tecture and digital error correction to guarantee 12-bit reso-
lution. The differential track/hold circuit is shown in Figure
1. The switches are controlled by an internal clock which is
a non-overlapping two phase signal,
φ
1 and
φ
2. At the
sampling time the input signal is sampled on the bottom
plates of the input capacitors. In the next clock phase,
φ
2, the
bottom plates of the input capacitors are connected together
and the feedback capacitors are switched to the op amp
output. At this time the charge redistributes between C
I
and
C
H
, completing one track/hold cycle. The differential output
is a held DC representation of the analog input at the sample
time. The track/hold circuit can also convert a single-ended
input signal into a fully differential signal for the quantizer.
The pipelined quantizer architecture has 11 stages with each
stage containing a two-bit quantizer and a two bit digital-to-
analog converter, as shown in Figure 2. Each two-bit quan-
tizer stage converts on the edge of the sub-clock, which is
twice the frequency of the externally applied clock. The
output of each quantizer is fed into its own delay line to
φ
1
φ
1
φ
2
φ
1
φ
1
φ
1
φ
1
φ
1
φ
2
φ
1
φ
2
φ
1
φ
2
IN
IN
OUT
OUT
Op Amp
Bias
V
CM
Op Amp
Bias
V
CM
C
H
C
I
C
I
C
H
Input Clock (50%)
Internal Non-overlapping Clock
B1 (MSB)
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12 (LSB)
2-Bit
DAC
2-Bit
Flash
Input
T/H
Digital Delay
x2
x2
2-Bit
DAC
2-Bit
Flash
Digital Delay
2-Bit
Flash
Digital Delay
2-Bit
DAC
2-Bit
Flash
Digital Delay
x2
D
IN
IN
STAGE 1
STAGE 2
STAGE 10
STAGE 11
Σ
+
–
Σ
+
–
Σ
+
–
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADS801E | 12-Bit, 25MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS801U | REC3-SRW_DRW/H* Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 12V; Output Voltage (Vdc): 12V; Power: 3W; 2kV, 4kVDC & 6kVDC Isolation; Industry Standard 3W DIP24 Package; Feedback Regulated Output; Continuous Short Circuit Protection; Wide Input 2:1 & 4:1; Medical Approvals (4kV/6kV Versions); EN and UL Certificates; 3 Pinout Options, 3 Case Styles; Control Pin Option; Efficiency to 86% |
| ADS802 | 12-Bit, 10MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS802E | 12-Bit, 10MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS802U | 12-Bit, 10MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS801E | 制造商:BB 制造商全稱:BB 功能描述:12-Bit, 25MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS801U | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 25 MSPS SE/Diff inputs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS801UG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 25 MSPS SE/Diff inputs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS802 | 制造商:BB 制造商全稱:BB 功能描述:12-Bit, 10MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS8028 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-Bit, 1-MSPS, 8-Channel, SAR ADC |
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