參數(shù)資料
型號(hào): ADS7861
元件分類: 通用總線功能
英文描述: CMOS 8-Stage Presettable 8-Bit Binary Synchronous Down Counter 16-CDIP -55 to 125
中文描述: 雙通道,為500kHz,12位,2通道,同步采樣模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 2/15頁
文件大?。?/td> 226K
代理商: ADS7861
2
ADS7861
SPECIFICATIONS
All specifications T
MIN
to T
MAX
, +V
A
+ V
D
= +5V, and V
REF
= internal +2.5V, f
CLK
= 8MHz, f
SAMPLE
= 500kHz, unless otherwise noted.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
ADS7861E
ADS7861EB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
RESOLUTION
12
6
Bits
ANALOG INPUT
Input Voltage Range-Bipolar
Input Capacitance
Input Leakage Current
V
CENTER
= Internal V
REF
at 2.5V
–V
REF
+V
REF
6
6
V
pF
μ
A
15
±
1
6
6
SYSTEM PERFORMANCE
No Missing Codes
Integral Linearity
Integral Linearity Match
Differential Linearity
Bipolar Offset Error
Bipolar Offset Error Match
Positive Gain Error
Positive Gain Error Match
Negative Gain Error
Negative Gain Error Match
Common-Mode Rejection Ratio
12
6
Bits
LSB
LSB
LSB
LSB
LSB
±
0.75
0.5
±
1
±
0.5
±
2
±
1
±
0.5
6
±
0.5
6
±
1
6
±
1
6
2
Referenced to REF
IN
±
3
3
Referenced to REF
IN
±
0.15
±
0.75
2
±
0.75
2
±
0.10
±
0.50
1
±
0.50
1
% of FSR
LSB
% of FSR
LSB
dB
dB
μ
Vrms
LSB
Referenced to REF
IN
±
0.15
±
0.10
At DC
80
80
120
0.5
6
6
6
6
V
IN
=
±
1.25Vp-p at 50kHz
Noise
Power Supply Rejection Ratio
2
6
SAMPLING DYNAMICS
Conversion Time per A/D
Acquisition Time
Throughput Rate
Aperture Delay
Aperture Delay Matching
Aperture Jitter
Small-Signal Bandwidth
1.625
0.375
6
6
μ
s
μ
s
kHz
ns
ps
ps
MHz
500
6
3.5
100
50
40
6
6
6
6
DYNAMIC CHARACTERISTICS
Total Harmonic Distortion
SINAD
Spurious Free Dynamic Range
Channel-to-Channel Isolation
V
IN
=
±
2.5Vp-p at 100kHz
V
IN
=
±
2.5Vp-p at 100kHz
V
IN
=
±
2.5Vp-p at 100kHz
V
IN
=
±
2.5Vp-p at 100kHz
–72
–76
dB
dB
dB
dB
70
72
6
76
–80
6
VOLTAGE REFERENCE
Internal
Internal Drift
Internal Noise
Internal Source Current
Internal Load Rejection
Internal PSRR
External Voltage Range
Input Current
Input Capacitance
2.475
2.5
±
25
50
2
0.005
80
2.5
0.05
5
2.525
6
6
6
6
6
6
6
6
6
6
6
V
ppm/
°
C
μ
Vp-p
mA
mV/
μ
A
dB
V
μ
A
pF
1.2
2.6
1
6
6
6
DIGITAL INPUT/OUTPUT
Logic Family
Logic Levels: V
IH
CMOS
6
I
IH
= +5
μ
A
I
= +5
μ
A
3.0
–0.3
3.5
+V
DD
+ 0.3
1
6
6
6
6
6
V
V
V
V
V
IL
V
OH
V
I
OH
= 2 CMOS Loads
I
OL
= 2 CMOS Loads
0.4
8
6
6
External Clock, Optional
Data Format
0.2
Binary Two’s Complement
6
MHz
6
POWER SUPPLY REQUIREMENTS
Power Supply Voltage, +V
Quiescent Current, +V
A
Power Dissipation
4.75
5
5
25
5.25
8
40
6
6
6
6
6
6
6
V
mA
mW
6
Specifications same as ADS7861E.
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