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參數(shù)資料
| 型號： | ADS7841EB |
| 元件分類： | 通用總線功能 |
| 英文描述： | CMOS 8-Stage Presettable 2-Decade BCD Synchronous Down Counter 16-PDIP -55 to 125 |
| 中文描述： | 12位，4通道串行輸出采樣模擬到數(shù)字轉換器 |
| 文件頁數(shù)： | 13/14頁 |
| 文件大?。?/td> | 277K |
| 代理商： | ADS7841EB |
13
ADS7841
Data Format
The ADS7841 output data is in straight binary format as
shown in Figure 7. This figure shows the ideal output code
for the given input voltage and does not include the effects
of offset, gain, or noise.
remain approximately equal. However, if the DCLK fre-
quency is kept at the maximum rate during a conversion, but
conversion are simply done less often, then the difference
between the two modes is dramatic. Figure 8 shows the
difference between reducing the DCLK frequency (“scal-
ing” DCLK to match the conversion rate) or maintaining
DCLK at the highest frequency and reducing the number of
conversion per second. In the later case, the converter
spends an increasing percentage of its time in power-down
mode (assuming the auto power-down mode is active).
If DCLK is active and CS is LOW while the ADS7841 is in
auto power-down mode, the device will continue to dissipate
some power in the digital logic. The power can be reduced
to a minimum by keeping CS HIGH. The differences in
supply current for these two cases are shown in Figure 9.
Operating the ADS7841 in auto power-down mode will
result in the lowest power dissipation, and there is no
conversion time “penalty” on power-up. The very first
conversion will be valid. SHDN can be used to force an
immediate power-down.
O
0V
FS = Full-Scale Voltage = V
REF
1 LSB = V
REF
/4096
FS – 1 LSB
11...111
11...110
11...101
00...010
00...001
00...000
1 LSB
Note 1: Voltage at converter input, after
multiplexer: +IN
–
(
–
IN). See Figure 2.
Input Voltage
(1)
(V)
FIGURE 7. Ideal Input Voltages and Output Codes.
8-Bit Conversion
The ADS7841 provides an 8-bit conversion mode that can
be used when faster throughput is needed and the digital
result is not as critical. By switching to the 8-bit mode, a
conversion is complete four clock cycles earlier. This could
be used in conjunction with serial interfaces that provide a
12-bit transfer or two conversions could be accomplished
with three 8-bit transfers. Not only does this shorten each
conversion by four bits (25% faster throughput), but each
conversion can actually occur at a faster clock rate. This is
because the internal settling time of the ADS7841 is not as
critical, settling to better than 8 bits is all that is needed. The
clock rate can be as much as 50% faster. The faster clock
rate and fewer clock cycles combine to provide a 2x increase
in conversion rate.
POWER DISSIPATION
There are three power modes for the ADS7841: full power
(PD1 - PD0 = 11B), auto power-down (PD1 - PD0 = 00B),
and shutdown (SHDN LOW). The affects of these modes
varies depending on how the ADS7841 is being operated. For
example, at full conversion rate and 16 clocks per conver-
sion, there is very little difference between full power mode
and auto power-down. Likewise, if the device has entered
auto power-down, a shutdown (SHDN LOW) will not lower
power dissipation.
When operating at full-speed and 16-clocks per conversion
(as shown in Figure 4), the ADS7841 spends most of its time
acquiring or converting. There is little time for auto power-
down, assuming that this mode is active. Thus, the differ-
ence between full power mode and auto power-down is
negligible. If the conversion rate is decreased by simply
slowing the frequency of the DCLK input, the two modes
FIGURE 8. Supply Current vs Directly Scaling the Fre-
quency of DCLK with Sample Rate or Keeping
DCLK at the Maximum Possible Frequency.
10k
100k
1k
1M
f
SAMPLE
(Hz)
S
100
10
1
1000
f
CLK
= 2MHz
f
CLK
= 16 f
SAMPLE
T
A
= 25°C
+V
CC
= +2.7V
V
= +2.5V
PD1 = PD0 = 0
FIGURE 9. Supply Current vs State of CS.
10k
100k
1k
1M
f
SAMPLE
(Hz)
S
0.00
0.09
14
0
2
4
6
8
10
12
CS LOW
(GND)
CS HIGH (+V
CC
)
T
A
= 25°C
+V
CC
= +2.7V
V
REF
= +2.5V
f
= 16 f
PD1 = PD0 = 0
相關PDF資料 |
PDF描述 |
|---|---|
| ADS7841P | 12-Bit, 4-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7841PB | CMOS 8-Stage Presettable 2-Decade BCD Synchronous Down Counter 16-SO -55 to 125 |
| ADS7842 | CMOS 8-Stage Presettable 2-Decade BCD Synchronous Down Counter 16-SO -55 to 125 |
| ADS7842E | 12-Bit, 4-Channel Parallel Output Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7842EB | CMOS 8-Stage Presettable 2-Decade BCD Synchronous Down Counter 16-TSSOP -55 to 125 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7841EB | 制造商:Texas Instruments 功能描述:IC 12BIT ADC 200KHZ 7841 SSOP16 制造商:Texas Instruments 功能描述:IC, 12BIT ADC, 200KHZ, 7841, SSOP16 制造商:Texas Instruments 功能描述:IC, 12BIT ADC, 200KHZ, 7841, SSOP16; Resolution (Bits):12bit; Sampling Rate:200kSPS; Supply Voltage Type:Single; Supply Voltage Min:2.7V; Supply Voltage Max:5.25V; Supply Current:550A; Digital IC Case Style:SSOP; No. of Pins:16; ;RoHS Compliant: Yes |
| ADS7841EB | 制造商:Texas Instruments 功能描述:IC's |
| ADS7841EB/2K5 | 功能描述:模數(shù)轉換器 - ADC 12-Bit 4-Ch Serial Output Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7841EB/2K5G4 | 功能描述:模數(shù)轉換器 - ADC 12-Bit 4-Ch Serial Output Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7841EB2K5 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-Bit, 4-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTER |
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