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參數(shù)資料
| 型號： | ADS7831U |
| 英文描述： | 12-Bit 600kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER |
| 中文描述： | 12位600kHz的采樣CMOS模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 313K |
| 代理商： | ADS7831U |
2
ADS7831
ADS7831P, U
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RESOLUTION
ANALOG INPUT
Voltage Range
Impedance
Capacitance
THROUGHPUT SPEED
Conversion Time
Complete Cycle
Throughput Rate
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
Total Unadjusted Error
(2, 3)
(Includes Bipolar Zero Error and Full Scale Error)
Power Supply Sensitivity
(+V
DIG
= +V
ANA
= V
D
)
12
Bits
±
2.5
3.1
5
V
k
pF
1.3
μ
s
μ
s
kHz
Acquire & Convert
1.66
600
±
1
±
1
LSB
(1)
LSB
Guaranteed
±
10
LSB
+4.75V < V
D
< +5.25V
–5.25V < –V
ANA
< –4.75V
±
5
LSB
AC ACCURACY
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise+Distortion)
Signal-to-Noise
Usable Bandwidth
(5)
Full-Power Bandwidth
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Overvoltage Recovery
(6)
REFERENCE
Reference Voltage
Reference DC Source Current
(External load should be static)
DIGITAL INPUTS
Logic Levels
V
IL
V
IH
I
IL
I
IH
DIGITAL OUTPUTS
Data Format
Data Coding
V
OL
V
OH
Leakage Current
f
IN
= 250kHz
f
IN
= 250kHz
f
IN
= 250kHz
f
IN
= 250kHz
77
87
–85
71
72
1.6
15
dB
(4)
dB
dB
dB
MHz
MHz
–77
69
69
20
10
200
250
ns
ps
ns
ns
FS Step
2.45
2.5
100
2.55
V
μ
A
–0.3
+2.4
+0.8
V
D
+ 0.3
±
10
±
10
V
V
μ
A
μ
A
V
IL
= 0V
V
IH
= 5V
I
SINK
= 1.6mA
I
SOURCE
= 500
μ
A
High-Z State,
V
OUT
= 0V to V
DIG
+0.4
V
V
μ
A
+2.8
±
5
Output Capacitance
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
POWER SUPPLIES
Specified Performance
+V
DIG
= +V
ANA
–V
ANA
+I
DIG
+I
ANA
–I
Power Dissipation
TEMPERATURE RANGE
Specified Performance
Storage
Thermal Resistance (
θ
JA
)
Plastic DIP
SOIC
15
pF
62
83
ns
ns
+4.75
–5.25
+5
–5
+16
+16
–12
220
+5.25
–4.75
V
V
mA
mA
mA
mW
f
S
= 600kHz
275
–40
–65
+85
+150
°
C
°
C
75
75
°
C/W
°
C/W
NOTES: (1) LSB means Least Significant Bit. For the 12-bit,
±
2.5V input ADS7831, one LSB is 1.22mV. (2) Measured with 50
in series with analog input. Adjustable
to zero with external potentiometers. (3) Total unadjusted error is the worst case of –Full Scale or +Full Scale untrimmed deviation from ideal first and last code
transitions and includes the effect of offset error. (4) All specifications in dB are referred to a full-scale
±
2.5V input. (5) Usable Bandwidth defined as Full-Scale input
frequency at which Signal-to-(Noise+Distortion) degrades to 60dB, or 10 bits of accuracy. 6) Recovers to specified performance after 2 x FS input over voltage.
SPECIFICATIONS
At T
A
= –40
°
C to +85
°
C, f
S
= 600kHz, +V
DIG
= +V
ANA
= +5V, –V
ANA
= –5V, using internal reference and the 50
input resistor shown in Figure 4b, unless otherwise specified.
Parallel 12-bits
Binary Two's Complement
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| ADS7833 | 制造商:BB 制造商全稱:BB 功能描述:10-Channel, 12-Bit DATA ACQUISITION SYSTEM |
| ADS7833N | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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