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ADS7815
8
SBAS065B
www.ti.com
LAYOUT
The layout of the ADS7815 and accompanying components
will be critical for optimum performance. Use of an analog
ground plane is essential. Use of +5V and –5V power planes
is not critical as long as the supplies are well bypassed, and
the traces connecting +5V and –5V to the power connector
are not too long or too thin.
The two +VS power pins of the ADS7815 must be tied
together. The voltage source for these pins should also
power the input buffer and the 74HC00 shown in Figure 1.
This supply should separate from the positive +5V supply
for the system’s digital logic
Three ground pins are present on the ADS7815: pin 2, pin 5,
and pin 14. These should all be tied to the analog ground
plane. The analog ground plane should extend underneath
all analog signal conditioning components and up to the
74HC574s (or equivalent components) shown in Figure 1.
The 74HC574s should not be located more than several
inches from the ADS7815.
The ground for the 74HC574s should be connected to the
digital ground. The analog ground plane should extend up to
the 74HC574s but should be kept at least 1/4" (6mm) distant
from the digital ground plane (if present). The analog and
digital grounds planes should not overlap at any point.
INTERMEDIATE LATCHES
The 74HC574s shown in Figure 1 isolate the ADS7815 from
digital signals on a microprocessor, digital signal processor
(DSP), or microcontroller bus. This is necessary because of
the precision needed within the ADS7815. The weight of a
single LSB in the ADS7815 is 76
V, and the comparator
must be able to resolve differences in voltage to this level.
External digital signals which transition during the conver-
sion can easily couple onto the substrate and produce volt-
ages larger than this.
In place of the 74HC574s, it might be possible to use a FIFO
or similar type of memory device. For the majority of
systems, it will be difficult to go directly from the ADS7815
into a microcontroller or DSP even if the ADS7815 is not
connected to shared bus. The reason for this is that during a
conversion, the ADS7815 outputs are tri-stated. The only
chance to read the outputs are during the acquisition period.
And, this is not recommended if the data will be read just
prior to the converter going into the hold mode.
SIGNAL CONDITIONING
The ADS7815 input essentially consists of a switch and a
capacitor. In the acquisition or sample mode, the switch is
closed and the input signal drives the capacitor directly.
When a conversion is started, the switch is opened capturing
the input signal at that moment. This voltage is held on the
capacitor for the remainder of the conversion.
While this provides for a wide bandwidth sample and hold
function and results in excellent AC performance, this archi-
tecture requires a high bandwidth, precision op amp to drive
the analog input. The op amp and configuration shown in
Figure 1 is highly recommended. The amplifier should be
placed within 1 to 2 inches (25 to 50mm) of the ADS7815,
and the layout guidelines in the OPA628 data sheet should
be strictly followed.