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參數(shù)資料
| 型號： | ADS5421T |
| 英文描述： | 14-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 14位，40MHz的采樣模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 8/21頁 |
| 文件大小： | 395K |
| 代理商： | ADS5421T |
ADS5421
SBAS237D
8
www.ti.com
APPLICATION INFORMATION
THEORY OF OPERATION
The ADS5421 is a high-speed, high-performance, CMOS
ADC build with a fully differential pipeline architecture. Each
stage contains a low-resolution quantizer and digital error
correction logic ensuring good differential linearity. The con-
version process is initiated by a rising edge of the external
convert clock. Once the signal is captured by the input track-
and-hold amplifier, the bits are sequentially encoded starting
with the Most Significant Bit (MSB). This process results in a
data latency of 10 clock cycles after which the output data is
available as a 14-bit parallel word either coded in a Straight
Offset Binary or Binary Two’s Complement format.
The analog input of the ADS5421 consists of a differential
track-and-hold circuit, as shown in Figure 1. The differential
topology produces a high level of AC performance at high
sampling rates. It also results in a very high usable input
bandwidth—especially important for Intermediate Frequency
(IF) or undersampling applications. Both inputs (IN, IN)
require external biasing up to a common-mode voltage that
is typically at the mid-supply level (+V
S
/2). This is because
the on-resistance of the CMOS switches is lowest at this
voltage, minimizing the effects of the signal-dependent,
FIGURE 1. Simplified Circuit of Input Track-and-Hold Amplifier.
T&H
C
IN
V
BIAS
V
BIAS
C
IN
S
1
S
2
S
3
S
4
S
6
S
5
IN
IN
Tracking Phase: S
1
, S
2
, S
3
, S
4
closed; S
5
, S
6
open
Hold Phase: S
1
, S
2
, S
3
, S
4
open; S
5
, S
6
closed
ADS5421
TYPICAL CHARACTERISTICS
(Cont.)
T
= 25
°
C, +V
SA
= +V
SD
= +5V, differential input range = 1.5V to 3.5V each input (4Vp-p), sampling rate = 40MSPS, internal reference, and VDRV = 3V, unless otherwise
noted.
SWEPT POWER (SNR)
(
F
IN
= 10MHz)
S
Input Amplitude (dBFS)
–60
–40
–50
–30
–20
–10
0
90
80
70
60
50
40
30
20
10
0
dBc
dBFS
OUTPUT NOISE HISTOGRAM
(DC Common-Mode Input)
C
Code
N – 3
N – 2
N – 1
N
N + 1
N + 2
N + 3
700000
600000
500000
400000
300000
200000
100000
0
nonlinearity of R
ON
. For ease of use, the ADS5421 incorpo-
rates a selectable voltage reference, a versatile clock input,
and a logic output driver designed to interface to 3V or 5V
logic.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS5421Y | 制造商:BB 制造商全稱:BB 功能描述:14-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS5421Y/R | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14 Bit 40MSPS Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS5421Y/RG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14 Bit 40MSPS Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS5421Y/T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14 Bit 40MSPS Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS5421Y/TG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14 Bit 40MSPS Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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