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參數(shù)資料
| 型號： | ADS5421R |
| 英文描述： | 14-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 14位，40MHz的采樣模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 12/21頁 |
| 文件大小： | 395K |
| 代理商： | ADS5421R |
ADS5421
SBAS237D
12
www.ti.com
Center Frequency (MHz)
3
0
–60
–65
–70
–75
–80
–85
5
10
15
20
25
30
35
40
45
50
4Vp-p
2Vp-p
FIGURE 7. Measured 2-Tone, 3rd-Order Distortion for a
Differential ADC Driver.
FIGURE 6. High Dynamic Range Interface Circuit with the OPA847 Set for a Gain of +8.5V/V.
ADS5421
47pF
IN
IN
CM
+5V
V
CM
1.7pF
OPA847
OPA847
850
50
Source
20
850
100
20
100
39pF
1.7pF
39pF
1:2
T
1
–5V
+5V
–5V
+5V
0.1
μ
F
V
CM
V
CM
< 6dB
Noise
Figure
AC-COUPLED, DIFFERENTIAL INTERFACE WITH
GAIN
The interface circuit example presented in Figure 6 employs
two OPA687s, (decompensated voltage-feedback op amps),
optimized for gains of 12V/V or higher. Implementing a new
compensation technique allows the OPA847s to operate with
a reduced signal gain of 8.5V/V, while maintaining the high
loop gain and the associated excellent distortion perfor-
mance offered by the decompensated architecture. For a
detailed discussion on this circuit and the compensation
scheme, refer to the OPA847 data sheet (SBOS251) located
at www.ti.com. Input transformer, T1, converts the single-
ended input signal to a differential signal required at the
inverting inputs of the amplifier, which are tuned to provide a
50
impedance match to an assumed 50
source. To
achieve the 50
input match at the primary of the 1:2
transformer, the secondary must see a 200
load imped-
ance. Both amplifiers are configured for the inverting mode
resulting in close gain and phase matching of the differential
signal. This technique, along with a highly symmetrical lay-
out, is instrumental in achieving a substantial reduction of the
2nd-harmonic, while retaining excellent 3rd-order perfor-
mance. A common-mode voltage, V
CM
, is applied to the
noninverting inputs of the OPA847. Additional series 20
resistors isolate the output of the op amps from the capaci-
tive load presented by the 40pF capacitors and the input
capacitance of the ADS5421. This 20
/47pF combination
sets a pole at approximately 85MHz and rolls off some of the
wideband noise resulting in a reduction of the noise floor.
For the measured 2-tone, 3rd-order distortion for the ampli-
fier portion of the circuit of Figure 6, see Figure 7. The upper
curve is for a total 2-tone envelope of 4Vp-p, requiring two
tones, each 2Vp-p across the OPA847 outputs. The lower
curve is for a 2Vp-p envelope, resulting in a 1Vp-p amplitude
per tone. The basic measurement dynamic range for the two
close-in spurious tones is approximately 85dBc. The 4Vp-p
test does not show measurable 3rd-order spurious until
25MHz, while the 2Vp-p is unmeasureable up to 40MHz
center frequency. 2-tone, 2nd-order intermodulation distor-
tion was unmeasureable for this circuit.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADS5421T | 制造商:BB 制造商全稱:BB 功能描述:14-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS5421Y | 制造商:BB 制造商全稱:BB 功能描述:14-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS5421Y/R | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14 Bit 40MSPS Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS5421Y/RG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14 Bit 40MSPS Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS5421Y/T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14 Bit 40MSPS Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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