參數(shù)資料
型號(hào)： ADS5240IPAPG4
元件分類(lèi)： ADC
英文描述： 4-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface
中文描述： 4通道，12位，40MSPS的ADC的串行LVDS接口
文件頁(yè)數(shù)： 6/24頁(yè)
文件大?。?/td> 418K
代理商： ADS5240IPAPG4
www.ti.com
LVDS DIGITAL DATA AND CLOCK OUTPUTS
Test conditions at I
O
= 3.5mA, R
LOAD
= 100
, and C
LOAD
= 6pF. I
O
refers to the current setting for the LVDS buffer. R
LOAD
is
the differential load resistance between the LVDS pair. C
LOAD
is the effective single-ended load capacitance between each of
the LVDS pins and ground. C
includes the receiver input parasitics as well as the routing parasitics. Measurements are
done with a transmission line of 100
characteristic impedance between the device and the load. All LVDS specifications are
characterized, but not tested at production.
SWITCHING CHARACTERISTICS
T
= -40
°
C and T
= +85
°
C. Typical values are at T
= 25
°
C, clock frequency = 40MSPS, 50% clock duty cycle,
AVDD = 3.3V, LVDD = 3.3V, -1dBFS, I
SET
= 56.2k
, internal voltage reference, and LVDS buffer current at 3.5mA per
channel, unless otherwise noted.
ADS5240
SBAS326C–JUNE 2004–REVISED DECEMBER 2004
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DC SPECIFICATIONS
(1)
Output Voltage High, OUT
P
or OUT
N
V
OH
R
= 100
±
1%
See LVDS Timing Diagram, Page 7
R
LOAD
= 100
±
1%
R
LOAD
= 100
±
1%
R
= 100
±
1%
See LVDS Timing Diagram, Page 7
V
CM
= 1.5V
R
LOAD
= 100
±
1%
R
LOAD
= 100
±
1%
Drivers Shorted to Ground
Drivers Shorted Together
1375
1500
mV
V
OL
Output Voltage Low, OUT
P
or OUT
N
|V
OD
| Output Differential Voltage, |OUT
P
- OUT
N
|
V
OS
Output Offset Voltage
(2)
900
300
1100
1025
350
1200
mV
mV
mV
400
1300
C
O
Output Capacitance
(3)
|
V
OD
| Change in |V
OD
| Between 0 and 1
V
OS
Change Between 0 and 1
ISOUT Output Short-Circuit Current
ISOUT
NP
Output Current
DRIVER AC SPECIFICATIONS
Clock LVDS Clock Duty Cycle
Minimum Data Setup Time
(4)(5)
Minimum Data Hold Time
(4)(5)
t
RISE
/t
FALL
V
OD
Rise Time or V
OD
Fall Time
4
pF
mV
mV
mA
mA
25
25
40
12
6
×
ADCLK (LCLK
P
, LCLK
N
)
45
50
650
650
400
250
200
150
55
%
ps
ps
ps
ps
ps
ps
I
O
= 2.5mA
I
O
= 3.5mA
I
O
= 4.5mA
I
O
= 6mA
(1)
(2)
(3)
(4)
(5)
The DC specifications refer to the condition where the LVDS outputs are not switching, but are permanently at a valid logic level 0 or 1.
V
refers to the common-mode of OUT
and OUT
.
or OUT
SBAA118
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS5240IPAPT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 12-bit 40MSPS w/Ser LVDS Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS5240IPAPTG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 12-bit 40MSPS w/Ser LVDS Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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ADS5242IPAP 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 12-bit 65MSPS w/Ser LVDS Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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