參數(shù)資料
型號(hào)： ADS5220RGZ
英文描述： 12-Bit, 40MSPS Sampling, +3.3V ANALOG-TO-DIGITAL CONVERTER
中文描述： 12位，40MSPS采樣，3.3V的模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù)： 16/20頁(yè)
文件大小： 433K
代理商： ADS5220RGZ
ADS5220
SBAS261A
16
www.ti.com
POWER DISSIPATION
In normal operating mode (STPD = low and QPD = low), the
typical total power dissipation of the ADS5220 is 195mW.
The majority of the power consumption is due to biasing;
therefore, this part of the total power dissipation is indepen-
dent of the applied clock frequency. The current on the
VDRV supply is directly related to the capacitive loading of
the data output pins; care must be taken to minimize such
loading.
24.9
24.9
2
402
402
2
NC
NC
26
25
OVR
24
NC
NC
23
22
D11 (MSB)
LATCH
SN74LVTH16374
ADS5220
10
11
D10
D9
12
D8
13
D7
D6
14
15
D5
D4
16
17
D3
18
D2
19
D1
20
D0 (LSB)
VREF
RSEL
IN
IN
NC
REFT
NC
REFB
AGND
AGND
AGND
DGND
DGND
DGND
AGND
AGND
AGND
CLK
21
30
31
0.10
μ
F
2.2
μ
F
+
42
41
35
34
33
32
38
39
40
43
44
45
27
28
29
46
V
PULSE
49.9
NC = No Connection.
+
–
+
15
μ
F
2.2
μ
F
0.10
μ
F
10
μ
F
+
3.3V
1.5V
DC
1.5V
DC
+3.3V
(AV
DD
)
10
μ
F
2.2
μ
F
22pF
15
μ
F
+
0.10
μ
F
1
2
3
4
5
4
4
3
3
M
O
M
S
Q
D
D
D
D
A
D
A
D
10
μ
F
+
10
μ
F
+
0.10
μ
F
3.3V
8
9
6
7
V
V
G
G
VDRV
FIGURE 11. General Configuration for the ADS5220.
POWER DOWN
The ADS5220 provides two power-down modes for different
application requirements. One is the Standard Power-Down
(STPD); the second is the Quasi-Power-Down (QPD). Both
pins will assume a logic low level (internal pull-down) and
configure the ADS5220 for normal operation. Setting STPD
to logic high (and QPD to logic low or high) will shut down the
internal ADC core and power down the reference circuit. In
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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ADS5221PFBT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-bit 65MSPS +3.3V RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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