參數(shù)資料
型號(hào)： ADS1255IDB
英文描述： Very Low Noise, 24-Bit Analog-to-Digital Converter
中文描述： 極低噪聲，24位模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 34/39頁
文件大?。?/td> 427K
代理商： ADS1255IDB
SBAS288D JUNE 2003 REVISED AUGUST 2004
www.ti.com
34
COMMAND DEFINITIONS
The commands summarized in Table 24 control the operation of the ADS1255/6. All of the commands are stand-alone
except for the register reads and writes (RREG, WREG) which require a second command byte plus data. Additional
command and data bytes may be shifted in without delay after the first command byte. The ORDER bit in the STATUS
register sets the order of the bits within the output data. CS must stay low during the entire command sequence.
Table 24. Command Definitions
COMMAND
WAKEUP
RDATA
RDATAC
SDATAC
RREG
WREG
SELFCAL
SELFOCAL
SELFGCAL
SYSOCAL
SYSGCAL
SYNC
STANDBY
RESET
WAKEUP
DESCRIPTION
1ST COMMAND BYTE
0000 0000
0000 0001
0000 0011
0000 1111
0001
rrrr
0101
rrrr
1111 0000
1111 0001
1111 0010
1111 0011
1111 0100
1111 1100
1111 1101
1111 1110
1111 1111
2ND COMMAND BYTE
Completes SYNC and Exits Standby Mode
Read Data
Read Data Continuously
Stop Read Data Continuously
Read from REG
rrr
Write to REG
rrr
Offset and Gain Self-Calibration
Offset Self-Calibration
Gain Self-Calibration
System Offset Calibration
System Gain Calibration
Synchronize the A/D Conversion
Begin Standby Mode
Reset to Power-Up Values
Completes SYNC and Exits Standby Mode
(00h)
(01h)
(03h)
(0Fh)
(1xh)
(5xh)
(F0h)
(F1h)
(F2h)
(F3h)
(F4h)
(FCh)
(FDh)
(FEh)
(FFh)
0000
nnnn
0000
nnnn
NOTE:
n
= number of registers to be read/written 1. For example, to read/write three registers, set
nnnn
= 2 (0010).
r
= starting register address for read/write commands.
RDATA: Read Data
Description:
Issue this command after DRDY goes low to read a single conversion result. After all 24 bits have been shifted
out on DOUT, DRDY goes high. It is not necessary to read back all 24 bits, but DRDY will then not return high until new
data is being updated. See the Timing Characteristics for the required delay between the end of the RDATA command and
the beginning of shifting data on DOUT: t
6
.
DOUT
SCLK
DIN
MSB
t
6
MidByte
LSB
DRDY
0000 0001
Figure 29. RDATA Command Sequence
相關(guān)PDF資料
PDF描述
ADS1255IDBR Very Low Noise, 24-Bit Analog-to-Digital Converter
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS1255IDBR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24 Bit 30kSPS Very Lo-Noise Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS1255IDBRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24 Bit 30kSPS Very Lo-Noise Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS1255IDBT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24 Bit 30kSPS Very Lo-Noise Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS1255IDBT 制造商:Texas Instruments 功能描述:ADC 24BIT 5V SPI 30MSPS 20SSOP 制造商:Texas Instruments 功能描述:ADC, 24BIT, 5V, SPI, 30MSPS, 20SSOP 制造商:Texas Instruments 功能描述:ADC, 24BIT, 5V, SPI, 30MSPS, 20SSOP; Resolution (Bits):24bit; Sampling Rate:30kSPS; Supply Voltage Type:Single; Supply Voltage Min:4.75V; Supply Voltage Max:5.25V; Supply Current:36mA; Digital IC Case Style:SSOP; No. of Pins:20; ;RoHS Compliant: Yes 制造商:Texas Instruments 功能描述:ADC, 24BIT, 5V, SPI, 30KSPS, 20SSOP ;ROHS COMPLIANT: YES
ADS1255IDBTG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24 Bit 30kSPS Very Lo-Noise Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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