參數(shù)資料
型號(hào)： ADS1255
英文描述： Very Low Noise, 24-Bit Analog-to-Digital Converter
中文描述： 極低噪聲，24位模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 30/39頁
文件大?。?/td> 427K
代理商： ADS1255
SBAS288D JUNE 2003 REVISED AUGUST 2004
www.ti.com
30
REGISTER MAP
The operation of the ADS1255/6 is controlled through a set of registers. Collectively, the registers contain all the information
needed to configure the part, such as data rate, multiplexer settings, PGA setting, calibration, etc., and are listed in
Table 23.
Table 23. Register Map
ADDRESS
REGISTER
RESET
VALUE
x1H
01H
20H
F0H
E0H
xxH
xxH
xxH
xxH
xxH
xxH
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
STATUS
MUX
ADCON
DRATE
IO
OFC0
OFC1
OFC2
FSC0
FSC1
FSC2
ID3
ID2
ID1
ID0
ORDER
NSEL3
SDCS0
DR3
DIO3
OFC03
OFC11
OFC19
FSC03
FSC11
FSC19
ACAL
NSEL2
PGA2
DR2
DIO2
OFC02
OFC10
OFC18
FSC02
FSC10
FSC18
BUFEN
NSEL1
PGA1
DR1
DIO1
OFC01
OFC09
OFC17
FSC01
FSC09
FSC17
DRDY
NSEL0
PGA0
DR0
DIO0
OFC00
OFC08
OFC16
FSC00
FSC08
FSC16
PSEL3
0
DR7
DIR3
OFC07
OFC15
OFC23
FSC07
FSC15
FSC23
PSEL2
CLK1
DR6
DIR2
OFC06
OFC14
OFC22
FSC06
FSC14
FSC22
PSEL1
CLK0
DR5
DIR1
OFC05
OFC13
OFC21
FSC05
FSC13
FSC21
PSEL0
SDCS1
DR4
DIR0
OFC04
OFC12
OFC20
FSC04
FSC12
FSC20
STATUS : STATUS REGISTER (ADDRESS 00h)
Reset Value = x1h
BIT 7
ID
BIT 6
ID
BIT 5
ID
BIT 4
ID
BIT 3
ORDER
BIT 2
ACAL
BIT 1
BUFEN
BIT 0
DRDY
Bits 7-4
ID3, ID2, ID1, ID0
Factory Programmed Identification Bits (Read Only)
Bit 3
ORDER:
Data Output
Bit Order
0 = Most Significant Bit First (default)
1 = Least Significant Bit First
Input data is always shifted in most significant byte and bit first. Output data is always shifted out most significant
byte first. The ORDER bit only controls the bit order of the output data within the byte.
Bit 2
ACAL
: Auto-Calibration
0 = Auto-Calibration Disabled (default)
1 = Auto-Calibration Enabled
When Auto-Calibration is enabled, self-calibration begins at the completion of the WREG command that changes
the PGA (bits 0-2 of ADCON register), DR (bits 7-0 in the DRATE register) or BUFEN (bit 1 in the STATUS register)
values.
Bit 1
BUFEN:
Analog Input Buffer Enable
0 = Buffer Disabled (default)
1 = Buffer Enabled
DRDY:
Data Ready (Read Only)
This bit duplicates the state of the DRDY pin.
Bit 0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS1255IDB 制造商:BB 制造商全稱:BB 功能描述:Very Low Noise, 24-Bit Analog-to-Digital Converter
ADS1255IDBR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24 Bit 30kSPS Very Lo-Noise Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS1255IDBRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24 Bit 30kSPS Very Lo-Noise Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS1255IDBT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24 Bit 30kSPS Very Lo-Noise Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS1255IDBT 制造商:Texas Instruments 功能描述:ADC 24BIT 5V SPI 30MSPS 20SSOP 制造商:Texas Instruments 功能描述:ADC, 24BIT, 5V, SPI, 30MSPS, 20SSOP 制造商:Texas Instruments 功能描述:ADC, 24BIT, 5V, SPI, 30MSPS, 20SSOP; Resolution (Bits):24bit; Sampling Rate:30kSPS; Supply Voltage Type:Single; Supply Voltage Min:4.75V; Supply Voltage Max:5.25V; Supply Current:36mA; Digital IC Case Style:SSOP; No. of Pins:20; ;RoHS Compliant: Yes 制造商:Texas Instruments 功能描述:ADC, 24BIT, 5V, SPI, 30KSPS, 20SSOP ;ROHS COMPLIANT: YES
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