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參數(shù)資料
| 型號： | ADS1254E |
| 英文描述： | 24-Bit, 20kHz, Low Power ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 24位20kHz的，低功耗模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 281K |
| 代理商： | ADS1254E |
ADS1254
SBAS213
7
THEORY OF OPERATION
The ADS1254 is a precision, high-dynamic range, 24-bit,
delta-sigma, A/D converter capable of achieving very
high-resolution digital results at high data rates.
The analog-input signal is sampled at a rate determined by the
frequency of the system clock (CLK). The sampled analog
input is modulated by the delta-sigma A/D modulator, which
is followed by a digital filter. A sinc
5
digital low-pass filter
processes the output of the delta-sigma modulator and writes
the result into the data-output register. The DOUT/DRDY pin
is pulled LOW, indicating that new data is available to be read
by the external microcontroller/microprocessor. As shown in
the block diagram, the main functional blocks of the ADS1254
are the fourth-order delta-sigma modulator, a digital filter,
control logic, and a serial interface. Each of these functional
blocks is described below.
ANALOG INPUT
The ADS1254 contains a fully differential analog input. In order
to provide low system noise, common-mode rejection of 102dB,
and excellent power-supply rejection, the design topology is
based on a fully differential switched-capacitor architecture. The
bipolar input voltage range is from –4.096V to +4.096V, when
the reference input voltage equals +4.096V. The bipolar range is
with respect to –V
IN
, and not with respect to GND.
Figure 1 shows the basic input structure of the ADS1254.
The impedance is directly related to the sampling frequency
of the input capacitor that is set by the CLK rate. Higher
CLK rates result in lower impedance, and lower CLK rates
result in higher impedance.
20.8kHz with a –3dB frequency of 4.24kHz. The –3dB
frequency scales with the system clock frequency.
To ensure the best linearity of the ADS1254, a fully differen-
tial signal is recommended.
INPUT MULTIPLEXER
The CHSEL1 and CHSEL0 pins are used to select the analog
input channel, as shown in Table I. The recommended
method for changing channels is to change them after the
conversion from the previous channel has been completed
and read. When a channel is changed, internal logic senses
the change on the falling edge of CLK and resets the
conversion process. The conversion data from the new
channel is valid on the first DRDY after the channel change.
When multiplexing inputs, it is possible to achieve sample
rates close to 4kHz. This is due to the fact that it requires five
internal conversion cycles for the data to fully settle. The
data also must be read before the channel is changed. The
DRDY signal indicates a valid result after the five cycles
have occurred.
BIPOLAR INPUT
CHSEL1
R
SW
(1300
Modulator Frequency
= f
MOD
Internal
Circuitry
C
(6pF typical)
V
CM
A
IN
The input impedance of the analog input changes with the
ADS1254 system clock frequency (CLK). The relationship is:
A
IN
Impedance (
) = (8MHz/CLK) 125,000
With regard to the analog-input signal, the overall analog
performance of the device is affected by three items: first, the
input impedance can affect accuracy. If the source impedance
of the input signal is significant, or if there is passive filtering
prior to the ADS1254, a significant portion of the signal can be
lost across this external impedance. The magnitude of the
effect is dependent on the desired system performance.
Second, the current into or out of the analog inputs must be
limited. Under no conditions should the current into or out
of the analog inputs exceed 10mA.
Third, to prevent aliasing of the input signal, the analog-input
signal must be band limited. The bandwidth of the A/D
converter is a function of the system clock frequency. With a
system clock frequency of 8MHz, the data-output rate is
FIGURE 1. Analog-Input Structure.
FIGURE 2. Level Shift Circuit for Bipolar Input Ranges.
BIPOLAR INPUT
R
1
R
2
5k
10k
20k
±
10V
±
5V
±
2.5V
2.5k
5k
10k
10k
20k
R
1
OPA4350
OPA4350
OPA4350
+IN
–
IN
V
REF
ADS1254
R
2
Bipolar
Input
REF
2.5V
CHSEL0
CHANNEL
0
0
1
1
0
1
0
1
CH1
CH2
CH3
CH4
TABLE I. Channel Selection.
Each of the differential inputs of the ADS1254 must stay
between AGND and AV
DD
. With a reference voltage at less
than half of AV
DD
, one input can be tied to the reference
voltage, and the other input can range from AGND to
2 V
REF
. By using a three op-amp circuit featuring a single
amplifier and four external resistors, the ADS1254 can be
configured to accept bipolar inputs referenced to ground.
The conventional
±
2.5V,
±
5V, and
±
10V input ranges can
be interfaced to the ADS1254 using the resistor values
shown in Figure 2.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS1254E | 制造商:Texas Instruments 功能描述:IC 24BIT ADC SMD 1254 SSOP20 制造商:Texas Instruments 功能描述:IC, 24BIT ADC, SMD, 1254, SSOP20 制造商:Texas Instruments 功能描述:IC, 24BIT ADC, SMD, 1254, SSOP20; Resolution (Bits):24bit; Sampling Rate:20.8kSPS; Supply Voltage Type:Single; Supply Voltage Min:4.75V; Supply Voltage Max:5.25V; Supply Current:800A; Digital IC Case Style:SSOP; No. of Pins:20; ;RoHS Compliant: Yes |
| ADS1254E/2K5 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24-Bit 20kHz Low Power RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1254E/2K5G4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24-Bit 20kHz Low Power RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1254EG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24-Bit 20kHz Low Power RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1254-EP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:24-Bit, 20-kHz, LOW POWER ANALOG-TO-DIGITAL CONVERTER |
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