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參數資料
| 型號： | ADS1250U |
| 英文描述： | 20-Bit Data Acquisition System ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 20位數據采集系統(tǒng)的模擬數字轉換器 |
| 文件頁數： | 4/20頁 |
| 文件大小： | 196K |
| 代理商： | ADS1250U |
4
ADS1250
PIN DESCRIPTIONS
PIN
NAME
PIN DESCRIPTION
1
2
3
4
5
6
+V
IN
–V
IN
AGND
+V
S
V
REF
DSYNC
Analog Input: Positive Input of the Differential Analog Input.
Analog Input: Negative Input of the Differential Analog Input.
Analog Input: Analog Ground.
Analog Input: Analog Power Supply Voltage, +5V.
Analog Input: Reference Voltage Input.
Digital Input: Data Synchronization. A falling edge on this input will reset the modulator count and place the modulator in a hold
state. The modulator is released from the hold state on the rising edge of DSYNC. This can be used to synchronize multiple
ADS1250s.
Digital Input: Digital Power Supply Voltage, +5V.
Digital Input: Digital Ground.
Digital Output: Serial Data Output. The serial data is clocked out of the serial data output shift register through this pin. The pin
is driven when CS is LOW, and high impedance when CS is HIGH.
Digital Input: Serial Clock. The serial clock is in the form of a CMOS-compatible clock. The serial clock can operate up to the
device’s system clock frequency. The serial clock can be either a free-running clock or noncontinuous clock, with either type of
clock; the serial data output is gated by CS.
Digital Input: Device System Clock. The system clock is in the form of a CMOS-compatible clock.
Digital Output: Data Ready. A falling edge on this output indicates that a new output word is available from the ADS1250 data output
register.
Digital Input: Chip Select. Active LOW logic input used to enable serial data output from the ADS1250. CS controls the state of
the DOUT pin. If CS is HIGH, DOUT is high impedance; if CS is LOW, DOUT drives the bus. CS can be used in three ways:
(1) If the ADS1250 shares the bus with other devices, CS is used as serial data output enable for communications.
(2) If the ADS1250 shares the bus with other devices and SCLK is a free-running clock, CS is used to gate serial data
out of the device.
(3) If the ADS1250 is the only device on the bus, CS can be tied LOW to always enable serial data output for a
two-wire interface.
Refer to the Serial Communications section of this data sheet for more detail.
Digital Input: Gain Selection Control (LSB).
Digital Input: Gain Selection Control (MSB).
Digital Input: Digital Ground.
7
8
9
+V
D
DGND
DOUT
10
SCLK
11
12
CLK
DRDY
13
CS
14
15
16
G0
G1
DGND
PIN CONFIGURATION
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+V
IN
ADS1250
AGND
–V
IN
+V
S
V
REF
DSYNC
+V
D
DGND
DGND
G0 (LSB)
G1 (MSB)
CS
DRDY
CLK
SCLK
DOUT
Top View
SOL-16
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| ADS1254 | 24-Bit, 20kHz, Low Power ANALOG-TO-DIGITAL CONVERTER |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADS1250U/1K | 功能描述:模數轉換器 - ADC SpeedPlus 20-Bit Data Acq System RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1250U/1KG4 | 功能描述:模數轉換器 - ADC SpeedPlus 20-Bit Data Acq System RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1250UG4 | 功能描述:模數轉換器 - ADC SpeedPlus 20-Bit Data Acq System RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1251 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:24-Bit, 20kHz, Low-Power ANALOG-TO-DIGITAL CONVERTER |
| ADS1251EVM | 功能描述:數據轉換 IC 開發(fā)工具 ADS1251 ADC Eval Mod RoHS:否 制造商:Texas Instruments 產品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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