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參數(shù)資料
| 型號(hào)： | ADS1226IRGVT |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 24-Bit Analog-to-Digital Converter with One- and Two-Channel Differential Inputs and Internal Oscillator |
| 中文描述： | 24位模擬數(shù)字轉(zhuǎn)換器與單和雙通道差分輸入和內(nèi)部振蕩器 |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 398K |
| 代理商： | ADS1226IRGVT |
www.ti.com
Analog Input Measurement Without the Input
Buffer
Zeff = t
/C
SAMPLE
A1
= 4M
W
Zeff = t
/C
SAMPLE
B
= 2M
W
Zeff = t
/C
SAMPLE
A2
= 4M
W
AINPx
AINNx
AVDD/2
AVDD/2
GND
100mV
(AINP, AINN)
VDD
100mV
Analog Input Measurement with the Input Buffer
MUX
AVDD
AVDD/2
AVDD/2
S
1
S
1
AINN
AINP
S
2
C
A1
3pF
C
B
6pF
C
A2
3pF
AVDD
ESD Protection
AINPx
AINNx
S
2
AINP
AINN
1G
W
ON
OFF
ON
S
1
S
2
OFF
t
= 12 s
m
SAMPLE
ADS1225
ADS1226
SBAS346–MAY 2006
With the buffer disabled by setting the BUFEN pin
low, the ADS1225 and ADS1226 measure the input
signal using internal capacitors that are continuously
charged
and
discharged.
simplified schematic of the ADS1225/6 input circuitry,
with
Figure 21
showing the on/off timings of the
switches. The S
switches close during the input
sampling phase. With S
1
closed, C
A1
charges to
AINP, C
A2
charges to AINN, and C
B
charges to
(AINP – AINN). For the discharge phase, S
opens
first and then S
2
closes. C
A1
and C
A2
discharge to
approximately VDD/2 and C
B
discharges to 0V. The
constant charging of the input capacitors presents a
load on the inputs that can be represented by
effective impedances.
Figure 22
shows the input
circuitry
with
the
capacitors
Figure 20
by their effective impedances.
Figure
20
shows
a
Figure 22. Effective Analog Input Impedances
with the Buffer Off
ESD silicon diodes protect the inputs. To keep these
diodes from turning on, make sure the voltages on
the input pins do not go below GND by more than
100mV, and likewise do not exceed VDD by 100mV.
This limitation is shown in
Equation 1
:
and
switches
of
(1)
When the buffer is enabled by setting the BUFEN pin
high, a low-drift, chopper-stabilized input buffer is
used to achieve very high input impedance. The
buffer charges the input sampling capacitors, thus
removing the load from the measurement. Because
the input buffer is chopper-stabilized, the charging of
parasitic capacitances causes the charge to be
carried
away,
as
if
by
impedance can be modeled by a single resistor, as
shown in
Figure 23
.
resistance.
The
input
Figure 20. Simplified Input Structure with the
Buffer Turned Off
Figure 23. Effective Analog Input Impedances
with the Buffer On
Note that the analog inputs (listed in the
Electrical
Characteristics
table as
Absolute Input Range
) must
remain between GND + 0.05V to AVDD – 1.5V.
Exceeding this range degrades linearity and results
in performance outside the specified limits.
Figure 21. S
1
and S
2
Switch Timing for
Figure 20
11
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