參數(shù)資料
型號: ADS1000A0IDBVTG4
廠商: Analog Devices, Inc.
英文描述: LOW POWER, 12-Bit ANALOG-TO-DIGITAL CONVERTER with I2C⑩ INTERFACE
中文描述: 低功耗,12位模擬數(shù)字轉(zhuǎn)換接口的I2C⑩
文件頁數(shù): 5/17頁
文件大?。?/td> 240K
代理商: ADS1000A0IDBVTG4
www.ti.com
ANALOG-TO-DIGITAL CONVERTER
The ADS1000 uses a switched-capacitor input stage.
To
external
circuitry,
it
resistance. The resistance value depends on the
capacitor values and the rate at which they are
switched. The switching clock is generated by the
onboard clock generator, so its frequency, nominally
275kHz,
is
dependent
temperature. The capacitor values depend on the
PGA setting.
RESET AND POWER-UP
OUTPUT CODE CALCULATION
The
ADS1000
outputs
complement format. The output code is confined to
the range of numbers: –2048 to 2047, and is given
by:
I
2
C INTERFACE
Output Code
2048(PGA)
V
IN
V
IN
V
DD
CLOCK GENERATOR
The ADS1000 features an onboard clock generator.
The
Typical Characteristics
show variations in data
rate over supply voltage and temperature. It is not
possible to operate the ADS1000 with an external
clock.
USING THE ADS1000
OPERATING MODES
ADS1000
SBAS357–SEPTEMBER 2006
THEORY OF OPERATION
places
immediately begins another conversion. When the
ADS1000 is in continuous conversion mode, the
ST/BSY bit in the configuration register always reads
'1'.
the
result
in
the
output
register,
and
The ADS1000 is a fully differential, 12-bit A/D
converter. The ADS1000 allows users to obtain
precise measurements with a minimum of effort, and
the device is extremely easy to design with and
configure.
In single conversion mode, the ADS1000 waits until
the ST/BSY bit in the conversion register is set to '1'.
When this happens, the ADS1000 powers up and
performs a single conversion. After the conversion
completes, the ADS1000 places the result in the
output register, resets the ST/BSY bit to '0' and
powers down. Writing a '1' to ST/BSY while a
conversion is in progress has no effect.
The ADS1000 consists of an A/D converter core with
adjustable gain, a clock generator, and an I
2
C
interface. Each of these blocks are described in
detail in the sections that follow.
looks
roughly
like
a
When switching from continuous conversion mode to
single conversion mode, the ADS1000 will complete
the current conversion, reset the ST/BSY bit to '0'
and power-down the device.
on
supply
voltage
and
When the ADS1000 powers up, it automatically
performs a reset. As part of the reset, the ADS1000
sets all of the bits in the configuration register to their
respective default settings.
The ADS1000 responds to the I
2
C General Call
Reset command. When the ADS1000 receives a
General Call Reset, it performs an internal reset,
exactly as though it had just been powered on.
The common-mode and differential input impedances
are different. For a gain setting of PGA, the
differential input impedance is typically 2.4M
/PGA.
The common-mode impedance is typically 8M
.
codes
in
binary
two’s
The
(Inter-Integrated Circuit) interface. The I
2
C interface
is
a
two-wire,
open-drain
multiple devices and masters on a single bus.
Devices on the I
2
C bus only drive the bus lines low,
by connecting them to ground; they never drive the
bus lines high. Instead, the bus wires are pulled high
by pull-up resistors, so the bus wires are high when
no device is driving them low. This way, two devices
cannot
conflict;
if
two
simultaneously, there is no driver contention.
Communication on the I
2
C bus always takes place
between two devices, one acting as the master and
the other acting as the slave. Both masters and
slaves can read and write, but slaves can only do so
under the direction of the master. Some I
2
C devices
can act as masters or slaves, but the ADS1000 can
only act as a slave device.
ADS1000
communicates
through
an
I
2
C
interface
supporting
devices
drive
the
bus
The ADS1000 operates in one of two modes:
continuous conversion and single conversion.
In
continuously
conversion
continuous
conversion
performs
has
been
mode,
conversions.
completed,
the
ADS1000
Once
ADS1000
a
the
5
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