參數(shù)資料
型號: ADR540BKS-R2
廠商: ANALOG DEVICES INC
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: High Precision Shunt Mode Voltage References
中文描述: 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 4.096 V, PDSO3
封裝: EIAJ, SC-70, 3 PIN
文件頁數(shù): 11/16頁
文件大?。?/td> 210K
代理商: ADR540BKS-R2
ADR520/ADR525/ADR530/ADR540/ADR550
THEORY OF OPERATION
The ADR520/ADR525/ADR530/ADR540/ADR550 use the
band gap concept to produce a stable, low temperature
coefficient voltage reference suitable for high accuracy data
acquisition components and systems. The devices use the
physical nature of a silicon transistor base-emitter voltage in the
forward-biased operating region. All such transistors have
approximately a –2 mV/°C temperature coefficient (TC),
making them unsuitable for direct use as a low temperature
coefficient reference. Extrapolation of the temperature
characteristic of any one of these devices to absolute zero (with
the collector current proportional to the absolute temperature),
however, reveals that its V
BE
approaches approximately the
silicon band gap voltage. Thus, if a voltage develops with an
opposing temperature coefficient to sum the V
BE
, a zero
temperature coefficient reference results. The ADR5xx circuit
shown in Figure 18 provides such a compensating voltage (V1)
by driving two transistors at different current densities and
amplifying the resultant V
BE
difference (V
BE
, which has a
positive temperature coefficient). The sum of V
BE
and V1
provides a stable voltage reference over temperature.
Rev. A | Page 11 of 16
0
V
BE
+
V
BE
+
V1
V–
V+
+
Figure 18. Circuit Schematic
APPLICATIONS
The ADR520/ADR525/ADR530/ADR540/ADR550 are a series
of precision shunt voltage references. They are designed to
operate without an external capacitor between the positive and
negative terminals. If a bypass capacitor is used to filter the
supply, the references remains stable.
All shunt voltage references require an external bias resistor
(R
BIAS
) between the supply voltage and the reference (see
Figure 19). The R
BIAS
sets the current that flows through the load
(I
L
) and the reference (I
IN
). Because the load and the supply
voltage can vary, the R
BIAS
needs to be chosen based on the
following considerations:
The R
BIAS
must be small enough to supply the minimum I
IN
current to the ADR5xx, even when the supply voltage is at
its minimum value and the load current is at its maximum
value.
The R
BIAS
must be large enough so that I
IN
does not exceed
10 mA when the supply voltage is at its maximum value
and the load current is at its minimum value.
Given these conditions, the
R
BIAS
is determined by the supply
voltage (
V
CC
), the ADR5xx load and operating current (
I
L
and
I
Q
), and the ADR5xx output voltage (
V
OUT
).
IN
L
OUT
V
CC
I
BIAS
I
V
R
=
(3)
0
V
OUT
V
S
ADR550
I
L
I
IN
R
BIAS
I
IN
+ I
L
Figure 19. Shunt Reference
Precision Negative Voltage Reference
The ADR5xx is suitable for applications where a precise
negative voltage is desired. Figure 20 shows the ADR5xx
configured to provide a negative output.
0
V
CC
–2.5V
ADR525
R
BIAS
Figure 20. Negative Precision Reference Configuration
Output Voltage Trim
The ADR5xx TRIM terminal can be used to adjust the output
voltage over a range of ±0.5%. This allows systems designers to
trim system errors by setting the reference to a voltage other
than the preset output voltage. An external mechanical or elec-
trical potentiometer can be used for this adjustment. Figure 21
illustrates how the output voltage can be trimmed by using the
AD5273, an Analog Devices 10 k potentiometer.
0
R1
470k
POTENTIOMETER
10k
ADR530
AD5273
R
BIAS
V
CC
V
OUT
Figure 21. Output Voltage Trim
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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