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參數(shù)資料
| 型號(hào)： | ADP3810AR-126 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Top Entry Connector Hood; Enclosure Material:Aluminum Alloy; For Use With:C146 Rectangular Circular Connectors; Connecting Termination:Screw; Gender:Male; No. of Contacts:48; Operating Voltage:400V; Series:C-146 RoHS Compliant: Yes |
| 中文描述： | 二次側(cè)，離線電池充電器控制器 |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 457K |
| 代理商： | ADP3810AR-126 |
ADP3810/ADP3811
–16–
REV. 0
C
P
Step 14. Calculate value of R
C2
to realize G
LOSS
:
Assuming that C
C2
is a short, R
C2
forms a resistor divider with
R3, reducing the loop gain. To calculate R
C2
, simply set the resis-
tor ratio to give an attenuation of 25.5 dB, which is a loss of 1/20.
R
C
2
=
R
3
20
1
=
1
k
To provide some margin in the circuit for gain fluctuations in
the various stages, the final value of R
C2
was adjusted down to
300
.
Step 15. Calculate the value of C
C2
:
To maintain high dc gain, a capacitor, C
C2
, is connected in se-
ries with R
C2
. The zero provided by this RC network should be
close to f
CI
to provide a phase boost at crossover:
f
Z
2
≈
1.9
kHz
1
2
π×
f
Z
2
×
R
C
2
C
C
2
=
=
1
2
π×
1.9
kHz
×
300
≈
200
nF
The pole frequency due to C
C2
and R3 can now be calculated
as:
f
P
2
=
1
2
π×
C
C
2
×
R
3
=
40
Hz
Step 16. Check the current loop phase margin:
Φ
M
=
180
arc
tan
f
CI
f
P
2
+
arc
tan
f
CI
f
P
1
f
CI
f
Z
2
arc
tan
f
CI
f
Z
3
f
CI
f
PM
+
arc
tan
f
CI
f
ZM
+
arc
tan
+
arc
tan
Φ
M
≈
115
°
The above formula subtracts the phase of each pole and adds
the phase of each zero. The poles and zeros come in pairs, f
P2
/f
Z2
calculated in Step 15 from C
C2
/R
C2
; f
PM
/f
ZM
calculated in Step 10
due to the output filter cap; and f
P1
/f
Z3
due to C
C1
/R
C1
. f
P1
is
the same pole that was calculated in Step 9, and f
Z3
needs to be
recalculated with the addition of the internal 200
resistor as
follows:
f
Z
3
=
2
π×
C
C
1
×
R
C
1
+
R
6
(
The final phase margin of 115
°
is more than adequate for a
stable current loop. In reality, higher order parasitic poles reduce
the phase margin to significantly less than 115
°
for a 1.9 kHz
crossover. The same was not the case for the voltage loop be-
cause the cross over frequency of 100 Hz was well below the
parasitic poles.
A PSpice analysis of the resulting loop gain and phase for the
values calculated is shown in Figure 33.
1
)
=
78
Hz
FREQUENCY – Hz
–50
P
0.01
100k
0.1
1
10
100
10k
100
50
0
0
180
100
G
1k
0dB CROSSOVER
PHASE MARGIN = 105
Figure 33. Current Loop Gain/Phase Plots
8-Lead Small Outline IC
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
5
4
1
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0500
(1.27)
BSC
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
°
0
°
0.0196 (0.50)
°
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADP3810AR-16.8 | 制造商:Analog Devices 功能描述:Battery Charger 6mA 16.8V 8-Pin SOIC N 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADP3810AR-168 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Secondary Side, Off-Line Battery Charger Controllers |
| ADP3810AR-4.2 | 制造商:Rochester Electronics LLC 功能描述:OFF-LINE BATTERY CHARGER CONTROLLER-4.2V - Bulk 制造商:Analog Devices 功能描述: |
| ADP3810AR-42 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Secondary Side, Off-Line Battery Charger Controllers |
| ADP3810AR-8.4 | 制造商:Analog Devices 功能描述:Battery Charger 6mA 8.4V 8-Pin SOIC N 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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