參數(shù)資料
型號: ADP1147AN-3.3
廠商: ANALOG DEVICES INC
元件分類: 穩(wěn)壓器
英文描述: Current-Mode SMPS Controller
中文描述: SWITCHING CONTROLLER, 250 kHz SWITCHING FREQ-MAX, PDIP8
封裝: PLASTIC, DIP-8
文件頁數(shù): 7/12頁
文件大小: 195K
代理商: ADP1147AN-3.3
ADP1147-3.3/ADP1147-5
–7–
REV. 0
APPLIC AT IONS
T he ADP1147 family of regulators incorporate a current mode,
constant off-time architecture to switch an external P-channel
MOSFET . T he external MOSFET can be switched at frequen-
cies up to 250 kHz. T he switching frequency of the device is
determined by the value selected for capacitor C
T
.
A regulated output voltage is maintained by the feedback volt-
age at the SENSE(–) pin. T he SENSE(–) pin is connected to an
internal voltage divider. T he voltage from this internal divider is
fed to comparator V, and gain block G. It is then compared to
an internal 1.25 volt reference.
T he ADP1147 is capable of maintaining high levels of efficiency
by automatically switching between the power saving and con-
tinuous modes. T he internal R-S flip-flop #2 controls the device
in the power saving mode, and gain block G assumes control
when the device is in the continuous mode of operation.
During the P-MOSFET on time, the voltage developed across
R
SENSE
is monitored by the SENSE(–) and SENSE(+) pins of
the device. When this voltage reaches the threshold level of
comparator C the output trips, switching the P drive to V
IN
, and
turns the external P-MOSFET off. At this point capacitor C
T
begins to discharge at a rate that is determined by the off-time
controller. T he C
T
discharge current is proportional to the
voltage measured at the SENSE(–) pin. When the voltage on
cap C
T
decays to the threshold voltage (V
T H1
), comparator T
switches and sets R-S flip-flop #1. T his forces the P-drive out-
put low, and turns on the P-MOSFET . T he sequence is then
repeated. As the load current is increased, the output voltage
starts to drop. T his causes the gain circuit to raise the threshold
of the current comparator, and the load current is now tracked.
When load currents are low, comparator B sets the R-S flip-flop
#2 and asserts the power savings mode of operation. Compara-
tor B monitors the voltage developed across R
SENSE
. As the load
current decreases to 50% of the designed inductor ripple cur-
rent, the voltage reverses polarity. T his reversal causes compara-
tor B to trip, setting the Q-bar output of R-S flip-flop #2 to a
logic zero, and interrupts the cycle by cycle operation of the
output. T he output storage capacitors are then slowly discharged
by the load. When the output cap voltage decays to the V
OS
level
of comparator V, it resets flip-flop #2, and the normal cycle by
cycle mode of operation resumes. If load currents are extremely
small, the time it takes for flip-flop #2 to reset increases. During
the extended wait for reset period, capacitor C
T
will discharge
below the value of V
T H2
causing comparator S to trip. T his
forces the internal sleep bar low and the device enters the sleep
mode. A significant amount of the IC is disabled during the
sleep mode, reducing the ground current from 1.6 mA to
160
μ
A, typical. In sleep mode the P-MOSFET is turned off
until additional inductor current is required. T he sleep mode is
terminated when flip-flop #2 is reset.
Due to the constant off-time architecture, the input voltage has
an effect on the device switching frequency. T o limit the effects
of this variation in frequency the discharge current is increased
as the device approaches the dropout voltage of V
IN
+1.5 V. In
the dropout mode the P-MOSFET is constantly turned on.
Determining the Output Current and the Value for R
SE NSE
T he value selected for R
SENSE
is determined by the required
output current. T he current comparator C has a threshold volt-
age range of 10 mV/R
SENSE
to 150 mV/R
SENSE
maximum. T his
threshold sets the peak current in the external inductor and
yields a maximum output current of:
I
MAX
=
I
PEAK
±
I
RIPPLE
p
p
2
T he resistance values for R
SENSE
can range from 20 m
to
200 m
. A graph for selecting R
SENSE
vs. the maximum out-
put current is shown in Figure 3.
T he value of R
SENSE
can be determined by using the following
equation:
R
SENSE
(
in m
) = 100/
I
MAX
T his equation allows for a design margin due to component
variations.
T he following equations are used to approximate the trip point
for the power savings mode and the peak short circuit current.
I
POWER SAVINGS
~
5
mV/R
SENSE
+ V
O
t
OFF
/2L
I
SC(PK)
= 150 mV/R
SENSE
T he ADP1147 automatically increases the t
OFF
time when a
short circuit condition is encountered. T his allows sufficient
time for the inductor to decay between switching cycles. Due to
the resulting inductor ripple current the average short circuit
current I
SC(AVG)
is reduced to approximately I
MAX
.
Determining the Operating Frequency and Selecting Values
for C
T
and L
T he ADP1147 incorporates a constant off-time architecture to
switch an external P-MOSFET . T he off-time (t
OFF
) is deter-
mined by the value of the external timing cap C
T
. When the
P-MOSFET is turned on the voltage across C
T
is charged to
approximately 3.3 volts. During the switch off-time the voltage
on C
T
is discharged by a current that is proportional to the
voltage level of V
OUT
. T he voltage across C
T
is representative of
the current in the inductor, which decays at a rate that is pro-
portional to V
OUT
. Due to this relationship the value of the
inductor must track the value selected for C
T
.
T he following equation is used to determine the desired con-
tinuous mode operating frequency:
C
T
=
1
V
OUT
+
V
D
V
IN
+
V
D
1.3
×
10
4
×
f
V
D
= the voltage drop across the Schottky diode.
T he graph in Figure 4 can be used to help determine the capaci-
tance value of C
T
vs. the operating frequency and input voltage.
T he P-MOSFET gate charge losses increase with the operating
frequency and results in lower efficiency (see the Efficiency
section).
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