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參數(shù)資料
| 型號： | ADN4696EBRZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX LVDS 2CH 8SOIC |
| 標準包裝： | 1,000 |
| 系列： | * |
ADN4696E/ADN4697E
Data Sheet
Rev. 0 | Page 16 of 20
APPLICATIONS INFORMATION
M-LVDS extends the low power, high speed differential
signalling of LVDS (low voltage differential signalling) to
multipoint systems where multiple nodes are connected over
short distances in a bus topology network.
With M-LVDS, a transmitting node drives a differential signal
across a transmission medium such as twisted pair cable. The
transmitted differential signal allows other receiving nodes
connected along the bus to detect a differential voltage that can
then be converted back into a single-ended logic signal by the
receiver.
The communication line is typically terminated at both ends
by resistors, RT, the value of which is chosen to match the
characteristic impedance of the medium (typically 100 ).
For half-duplex multipoint applications such as that shown in
Figure 37, only one driver can be enabled at any time. Full-
duplex nodes allow a master-slave topology as shown in Figure 38.
In this configuration, a master node can concurrently send and
receive data to/from slave nodes. At any time, only one slave
node can have its driver enabled to concurrently transmit data
back to the master node.
RO
NOTES
1. MAXIMUM NUMBER OF NODES: 32.
2. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED.
RE
A
B
R
D
RT
ADN4696E
DE
DI
RO RE
A
B
ADN4696E
DE
DI
RO RE
A
B
ADN4696E
DE
DI
RO RE
A
B
ADN4696E
DE
DI
10355-
037
R
D
R
D
R
D
R
D
R
D
R
D
R
D
Figure 37. ADN4696E Typical Half-Duplex M-LVDS Network (Type 2 Receivers with Threshold Offset for Bus-Idle Fail-Safe)
RO
NOTES
1. MAXIMUM NUMBER OF NODES: 32.
2. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED.
RE
A B Z
Y
MASTER
SLAVE
RT
ADN4697E
DE
DI
RO RE
DE
DI
RO RE
DE
DI
A B Z
Y
ADN4697E
A B Z
Y
ADN4697E
A B Z
Y
ADN4697E
RT
RO RE
DE
DI
10355-
038
R
D
R
D
R
D
R
D
Figure 38. ADN4697E Typical Full-Duplex M-LVDS Master-Slave Network (Type 2 Receivers with Threshold Offset for Bus-Idle Fail-Safe)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| ADN4697E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
| ADN4697EBRZ | 功能描述:IC RCVR LVDS 2CH 14SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標準包裝:27 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):3/3 規(guī)程:RS232，RS485 電源電壓:4.75 V ~ 5.25 V 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
| ADN4697EBRZ-RL7 | 功能描述:IC TXRX LVDS 2CH 14SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標準包裝:121 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN（3x3） 包裝:管件 |
| ADN5-24-1PM | 制造商:Johnson Components 功能描述:AC/DC Power Supply Single-OUT 24V 5A 120W 制造商:Emerson Network Power - Embedded Power 功能描述:PSU DIN RAIL 24V 5A 制造商:EMERSON NETWORK POWER 功能描述:PSU, DIN RAIL, 24V, 5A |
| ADN5-24-1PM-C | 功能描述:DIN導(dǎo)軌式電源 120W 24V @5A 1-Phase Metal - C Series RoHS:否 制造商:Mean Well 產(chǎn)品:Linear Supplies 商用/醫(yī)用:Commercial 輸出功率額定值:960 W 輸入電壓:180 VAC to 264 VAC, 254 VDC to 370 VDC 輸出端數(shù)量:1 輸出電壓（通道 1）:48 V 輸出電流（通道 1）: 輸出電壓（通道 2）: 輸出電流（通道 2）: 輸出電壓（通道 3）: 輸出電流（通道 3）: 尺寸:150 mm L x 110 mm W |
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