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參數(shù)資料
| 型號： | ADM690AARN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Microprocessor Supervisory Circuits |
| 中文描述： | 3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 327K |
| 代理商： | ADM690AARN |
ADM690A/ADM692A/ADM802L/M/ADM805L/M
–5–
REV. 0
BATTERY
SWITCHOVER
RESET
GENERATOR
WATCHDOG
TRANSITION DETECTOR
(1.6s)
4.65V*
1.25V
*4.4V FOR ADM692A/ADM802M/ADM805M
( ) = ADM805L/M ONLY
ADM690A
ADM692A
ADM802L
ADM802M
ADM805L
ADM805M
POWER FAIL
OUTPUT (PFO)
RESET
(RESET)
V
OUT
V
BATT
V
CC
WATCHDOG
INPUT (WDI)
POWER FAIL
INPUT (PFI)
Figure 7. Functional Block Diagram
POWER FAIL
RESET
, RESET
RESET
is an active low output which provides a
RESET
signal
to the microprocessor whenever V
CC
is at an invalid level. When
V
CC
falls below the reset threshold, the
RESET
output is forced
low. The nominal reset voltage threshold is 4.65 V (ADM690A/
ADM802L/ADM805L or 4.4 V ADM692A/ADM802M/
ADM805M.
On power-up
RESET
will remain low for 200 ms after V
CC
rises
above the reset threshold. This allows time for the power supply
and microprocessor to stabilize. On power-down, the
RESET
output remains low with V
CC
as low as 1 V. This ensures that
the microprocessor is held in a stable shutdown condition.
The guaranteed minimum and maximum thresholds are as follows:
ADM690A/ADM802L/ADM805L: 4.5 V and 4.75 V
ADM692A: 4.25 V and 4.5 V.
ADM802L: 4.55 V and 4.7 V
ADM802M: 4.3 V and 4.45 V
The ADM805L and ADM805M contain an active high reset
output. This is the complement of
RESET
and is intended for
processors requiring an active high RESET signal.
The guaranteed minimum and maximum thresholds for the
ADM805 are:
ADM805L: 4.5 V and 4.75 V
ADM805M: 4.25 V and 4.5 V.
Watchdog Timer
RESET
, RESET
The watchdog timer circuit monitors the activity of the micro-
processor in order to check that it is not stalled in an indefinite
loop. An output line on the processor is used to toggle the
Watchdog Input (WDI) line. If this line is not toggled within
1.6 seconds, a RESET pulse is generated. The watchdog
timeout period restarts with each transition on the WDI pin. To
ensure that the watchdog timer does not time out, either a
high-to-low or low-to-high transition on the WDI pin must
occur at or less than the minimum timeout period. If WDI
remains permanently either high or low, reset pulses will be
issued after each timeout period (1.6 s). The watchdog monitor
can be deactivated by floating the Watchdog Input (WDI) or by
connecting it to midsupply.
+5V
0V
+5V
0V
+5V
0V
+5V
0V
0V
3.0V
3.0V
t
RS
V
CC
V
OUT
RESET
RESET
PFO
V
BATT
= PFI = 3.0V
Figure 8. Timing Diagram
BATTERY SWITCHOVER SECTION
During normal operation with V
CC
higher than the reset
threshold, V
CC
is internally switched to V
OUT
via an internal
PMOS transistor switch. This switch has a typical on-resistance
of less than 1
and can supply up to 100 mA at the V
OUT
terminal. Once V
CC
falls below the reset threshold, the higher of
V
CC
or V
BATT
is switched to V
OUT
. This means that V
BATT
connects to V
OUT
only when V
CC
is below the reset threshold
and V
BATT
is greater than V
CC
.
V
OUT
is normally used to drive a RAM memory bank which
may require instantaneous currents of greater than 100 mA. If
this is the case, then a bypass capacitor should be connected to
V
OUT
. The capacitor will provide the peak current transients to the
RAM. A capacitance value of 0.1
μ
F or greater may be used.
A 9
MOSFET switch connects the V
BATT
input to V
OUT
during battery backup. This MOSFET has very low input-to-
output differential (dropout voltage) at the low current levels
required for battery backup of CMOS RAM or other low power
CMOS circuitry. The supply current in battery backup is
typically 0.05
μ
A.
Typically 3 V batteries are used as the backup supply. High
value capacitors, either standard electrolytic or the farad size
double layer capacitors, can also be used for short-term memory
back up. A small charging current of typically 10 nA (0.1
μ
A
max) flows out of the V
BATT
terminal. This current is useful for
maintaining rechargeable batteries in a fully charged condition.
This extends the life of the back up battery by compensating for
its self discharge current. Also note that this current poses no
problem when lithium batteries are used for back up since the
maximum charging current (0.1
μ
A) is safe for even the smallest
lithium cells.
If the battery-switchover section is not used, V
BATT
should be
connected to GND and V
OUT
should be connected to V
CC
.
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