參數(shù)資料
型號: ADM485EARZ
廠商: Analog Devices Inc
文件頁數(shù): 6/16頁
文件大?。?/td> 0K
描述: IC TXRX HALF DUP RS485/422 8SOIC
標(biāo)準(zhǔn)包裝: 98
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: RS422,RS485
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
產(chǎn)品目錄頁面: 790 (CN2011-ZH PDF)
ADM485E/ADM487E/ADM1487E
Rev. B | Page 14 of 16
ESD Testing
Two coupling methods are used for ESD testing: contact
discharge and air-gap discharge. Contact discharge calls for
a direct connection to the unit being tested; air-gap discharge
uses a higher test voltage but does not make direct contact with
the unit under test. With air discharge, the discharge gun is moved
toward the unit under test, developing an arc across the air gap;
thus, the term air discharge is used. This method is influenced
by humidity, temperature, barometric pressure, distance, and
rate of closure of the discharge gun. The contact-discharge
method, though less realistic, is more repeatable and is gaining
acceptance and preference over the air-gap method.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can
cause failures in unprotected semiconductors. Catastrophic
destruction can occur immediately as a result of arcing or heating.
Even if catastrophic failure does not occur immediately, the
device can suffer from parametric degradation, which can result
in degraded performance. The cumulative effects of continuous
exposure can eventually lead to complete failure.
06
35
6-
0
1
3
C1
R2
HIGH
VOLTAGE
GENERATOR
DEVICE
UNDER TEST
NOTES:
1. THE ESD TEST METHOD USED IS THE
HUMAN BODY MODEL (±15kV)
WITH R2 = 1500
AND C1 = 100pF.
Figure 27. ESD Generator
I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable can result in a static
discharge that can damage or completely destroy the interface
product connected to the I/O port. It is, therefore, extremely
important to have high levels of ESD protection on the I/O lines.
The ESD discharge can induce latch-up in the device under test.
Therefore, it is important that ESD testing on the I/O pins be
carried out while device power is applied. This type of testing
is more representative of a real-world I/O discharge where the
equipment is operating normally when the discharge occurs.
100%
90%
36.8%
10%
TIME (
t)
I PEA
K
tRL
tDL
06
35
6-
0
14
Figure 28. Human Body Model ESD Current Waveform
Table 9. ADM483E ESD Test Results
ESD Test Method
I/O Pins
Other Pins
Human body model (HBM)
±15 kV
±3.5 kV
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