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| 型號(hào)： | ADM483E |
| 廠(chǎng)商： | Analog Devices, Inc. |
| 英文描述： | +-15 kV ESD Protected, EMC Compliant Slew Rate Limited, EIA RS-485 Transceiver |
| 中文描述： | -15千伏ESD保護(hù)，EMC公司符合擺率限制，環(huán)境影響評(píng)估的RS - 485收發(fā)器 |
| 文件頁(yè)數(shù)： | 2/12頁(yè) |
| 文件大?。?/td> | 324K |
| 代理商： | ADM483E |
–2–
REV. 0
ADM483E–SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
DRIVER
Differential Output Voltage, V
OD
5.0
5.0
5.0
5.0
0.2
3
0.2
250
250
0.8
V
V
V
V
V
V
V
mA
mA
V
V
μ
A
V
CC
= 5.25 V. R =
∞
, Figure 1
R = 50
(RS-422), Figure 1
R = 27
(RS-485), Figure 1
V
TST
= –7 V to +12 V, Figure 2, V
CC
≥
4.75 V
R = 27
or 50
, Figure 1
R = 27
or 50
, Figure 1
R = 27
or 50
–7 V
≤
V
O
≤
+12 V
–7 V
≤
V
O
≤
+12 V
2.0
1.5
1.5
|V
OD
| for Complementary Output States
Common-Mode Output Voltage V
OC
|V
OC
| for Complementary Output States
Output Short Circuit Current (V
OUT
= High)
Output Short Circuit Current (V
OUT
= Low)
CMOS Input Logic Threshold Low, V
INL
CMOS Input Logic Threshold High, V
INH
Logic Input Current (DE, DI)
1.4
1.4
2.0
±
1.0
RECEIVER
Differential Input Threshold Voltage, V
TH
Input Voltage Hysteresis,
V
TH
Input Resistance
Input Current (A, B)
–0.2
+0.2
V
mV
k
mA
mA
μ
A
V
V
mA
μ
A
–7 V
≤
V
CM
≤
+12 V
V
CM
= 0 V
–7 V
≤
V
CM
≤
+12 V
V
IN
= 12 V
V
IN
= –7 V
70
12
+1
–0.8
Logic Enable Input Current (
RE
)
CMOS Output Voltage Low, V
OL
CMOS Output Voltage High, V
OH
Short Circuit Output Current
Three-State Output Leakage Current
±
1
0.4
I
OUT
= +4.0 mA
I
OUT
= –4.0 mA
V
OUT
= GND or V
CC
0.4 V
≤
V
OUT
≤
+2.4 V
4.0
7
85
±
1.0
POWER SUPPLY CURRENT
I
CC
(ADM483E)
Outputs Unloaded, Receivers Enabled
DE = 0 V (Disabled)
RE
= 0 V
DE = 5 V (Enabled) =
RE
= 0 V
DE = 0 V,
RE
= V
CC
36
270
0.1
60
360
10
μ
A
μ
A
μ
A
Supply Current in Shutdown
ESD/EFT IMMUNITY
ESD Protection
±
15
±
3.5
±
2
10
kV
kV
kV
V/m
HBM Air Discharge. A, B Pins
HBM 3015.7 Contact Discharge. All Pins
IEC1000-4-4, A, B Pins
IEC1000-4-3
EFT Protection
EMI Immunity
Specifications subject to change without notice.
TIMING SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
DRIVER
Propagation Delay Input to Output T
PLH
, T
PHL
Driver O/P to
O/P
T
SKEW
Driver Rise/Fall Time T
R
, T
F
Driver Enable to Output Valid
Driver Disable Timing
250
2000
800
2000
2000
3000
ns
ns
ns
ns
ns
R
L
Diff = 54
C
L1
= C
L2
= 100 pF, Figure 5
R
L
Diff = 54
C
L1
= C
L2
= 100 pF, Figure 5
R
L
Diff = 54
C
L1
= C
L2
= 100 pF, Figure 5
R
L
= 500
, C
L
= 100 pF, Figure 3
R
L
= 500
, C
L
= 15 pF, Figure 3
100
250
250
300
RECEIVER
Propagation Delay Input to Output T
PLH
, T
PHL
Skew |T
PLH
–T
PHL
|
Receiver Enable T
EN1
Receiver Disable T
EN2
250
2000
ns
ns
ns
ns
C
L
= 15 pF, Figure 5
200
10
10
50
50
R
L
= 1 k
, C
L
= 15 pF, Figure 4
R
L
= 1 k
, C
L
= 15 pF, Figure 4
SHUTDOWN
Time to Shutdown
Driver Enable from Shutdown
Receiver Enable from Shutdown
50
200
600
2000
2500
ns
ns
ns
R
L
= 500
, C
L
= 100 pF, Figure 3
R
L
= 1 k
, C
L
= 15 pF, Figure 4
Specifications subject to change without notice.
(V
CC
= +5 V
6
10%. All specifications T
MIN
to T
MAX
unless otherwise noted)
(V
CC
= +5 V
6
10%. All specifications T
MIN
to T
MAX
unless otherwise noted.)
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參數(shù)描述 |
|---|---|
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