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參數(shù)資料
| 型號： | ADM1232ARM |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Microprocessor Supervisory Circuit |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | MO-187AA, MSOP-8 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 122K |
| 代理商： | ADM1232ARM |
ADM1232
–4–
REV. B
PIN FUNCT ION DE SCRIPT IONS
Mnemonic
Function
PB RESET
Push Button Reset Input. T his debounced input will ignore pulses of less than 1 ms and is guaranteed to re-
spond to pulses greater than 20 ms.
T ime Delay Set allows the user to select the maximum amount of time the ADM1232 will allow the
STROBE
input to remain inactive (i.e.,
STROBE
is not receiving any high-to-low transitions), without forcing the
ADM1232 to generate a RESET pulse. (See
STROBE
specifications, Figure 4 and the note on
STROBE
timeout selection.)
T olerance Input. T his input will determine how much the supply voltage will be allowed to decrease (as a per-
centage tolerance) before a RESET is asserted. Connect to V
CC
for 10% and GND for 5%.
0 V ground reference for all signals.
Active high logic output. Will be asserted when:
1. V
CC
decreases below the amount specified by the T OLERANCE input or,
2.
PB RESET
is forced low or,
3. If there are no high-to-low transitions within the limits set by T D at
STROBE
or,
4. During power-up.
Inverse of RESET , with an open drain output.
T he
STROBE
input is used to monitor the activity of a microprocessor. If there are no high-to-low transi-
tions within the time specified by T D, a reset will be asserted.
Power supply input +5 V.
T D
T OLERANCE
GND
RESET
RESET
STROBE
V
CC
PIN CONFIGURAT IONS
R-16
N-8 and R-8
RM-8
14
13
12
11
16
15
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
ADM1232
NC = NO CONNECT
NC
STROBE
NC
NC
NC
TD
NC
NC
NC
TOLERANCE
GND
PB RESET
RESET
RESET
NC
V
CC
1
2
3
4
8
7
6
5
(TOP VIEW
ADM1232
PB RESET
RESET
STROBE
V
CC
TD
TOLERANCE
GND
RESET
1
2
3
4
8
7
6
5
(TOP VIEW
ADM1232
PB RESET
RESET
STROBE
V
CC
TD
TOLERANCE
GND
RESET
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