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參數(shù)資料
| 型號(hào)： | ADM1069ACP-REEL7 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | SUPER SEQUENCER-TM WITH MARGINING CONTROL AND AUXILIARY ADC INPUTS |
| 中文描述： | 超時(shí)序與裕度控制以及輔助ADC輸入商標(biāo) |
| 文件頁數(shù)： | 25/32頁 |
| 文件大小： | 626K |
| 代理商： | ADM1069ACP-REEL7 |
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Preliminary Technical Data
ADM1069
Rev. PrB | Page 25 of 32
0
POWER-UP
(V
CC
> 2.5V)
EEPROM
E
E
P
R
O
M
L
D
D
A
T
A
R
A
M
L
D
U
P
D
SMBus
DEVICE
CONTROLLER
LATCH A
LATCH B
FUNCTION
(OV THRESHOLD
ON VP1)
Figure 34. Configuration Update Flow Diagram
UPDATING THE SEQUENCING ENGINE
Sequencing engine (SE) functions are not updated in the same
way as regular configuration latches. The SE has its own
dedicated 512-byte EEPROM for storing state definitions,
providing 63 individual states with a 64-bit word each (one state
is reserved). At power-up, the first state is loaded from the SE
EEPROM into the engine itself. When the conditions of this
state are met, the next state is loaded from EEPROM into the
engine, and so on. The loading of each new state takes approxi-
mately 10 μs.
To alter a state, the required changes must be made directly to
EEPROM. RAM for each state does not exist. The relevant
alterations must be made to the 64-bit word, which is then
uploaded directly to EEPROM.
INTERNAL REGISTERS
The ADM1069 contains a large number of data registers. The
principal registers are the address pointer register and the
configuration registers.
Address Pointer Register
This register contains the address that selects one of the other
internal registers. When writing to the ADM1069, the first byte
of data is always a register address, which is written to the
address pointer register.
Configuration Registers
These registers provide control and configuration for various
operating parameters of the ADM1069.
EEPROM
The ADM1069 has two 512-byte cells of nonvolatile, electrically
erasable, programmable read-only memory (EEPROM), from
Register Addresses 0xF800 to 0xFBFF. The EEPROM is used for
permanent storage of data that is not lost when the ADM1069 is
powered down. One EEPROM cell contains the configuration
data of the device; the other contains the state definitions for
the SE. Although referred to as read-only memory, the
EEPROM can be written to as well as read from via the serial
bus in exactly the same way as the other registers.
The major differences between the EEPROM and other
registers are
An EEPROM location must be blank before it can be
written to. If it contains data, it must first be erased.
Writing to EEPROM is slower than writing to RAM.
Writing to the EEPROM should be restricted, because it
has a limited write/cycle life of typically 10,000 write
operations due to the usual EEPROM wear-out
mechanisms.
The first EEPROM is split into 16 (0 to 15) pages of 32 bytes
each. Pages 0 to 6, starting at Address 0xF800, hold the
configuration data for the applications on the ADM1069 (the
SFDs, PDOs, and so on). These EEPROM addresses are the
same as the RAM register addresses, prefixed by F8. Page 7 is
reserved. Pages 8 to 15 are for customer use.
Data can be downloaded from EEPROM to RAM in one of the
following ways:
At power-up, when Pages 0 to 6 are downloaded.
By setting Bit 0 of the UDOWNLD register (0xD8), which
performs a user download of Pages 0 to 6.
SERIAL BUS INTERFACE
The ADM1069 is controlled via the serial system management
bus (SMBus). The ADM1069 is connected to this bus as a slave
device, under the control of a master device. It takes approxi-
mately 1 ms after power-up for the ADM1069 to download
from its EEPROM. Therefore, access to the ADM1069 is re-
stricted until the download is completed.
Identifying the ADM1069 on the SMBus
The ADM1060 has a 7-bit serial bus slave address. The device is
powered up with a default serial bus address. The five MSBs of
the address are set to 01101; the two LSBs are determined by the
logical states of Pins A1 and A0. This allows the connection of
four ADM1069s to one SMBus.
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