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| 型號： | ADM1066ASU-U3 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Multisupply Supervisor/Sequencer with Margining Control and Auxiliary ADC Inputs |
| 中文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48 |
| 封裝： | 7 X 7 MM, MO-026ABC, TQFP-48 |
| 文件頁數(shù)： | 21/32頁 |
| 文件大?。?/td> | 861K |
| 代理商： | ADM1066ASU-U3 |
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ADM1066
SUPPLY MARGINING
OVERVIEW
It is often necessary for the system designer to adjust supplies,
either to optimize their level or force them away from nominal
values to characterize the system performance under these
conditions. This is a function typically performed during an in-
circuit test (ICT), such as when the manufacturer, for example,
wants to guarantee that the product under test functions
correctly at nominal supplies minus 10%.
Rev. 0 | Page 21 of 32
OPEN-LOOP MARGINING
The simplest method of margining a supply is to implement an
open-loop technique. A popular method for this is to switch
extra resistors into the feedback node of a power module, such
as a dc/dc converter or low dropout regulator (LDO). The extra
resistor alters the voltage at the feedback or trim node and
forces the output voltage to margin up or down by a certain
amount.
The ADM1066 can perform open-loop margining for up to six
supplies. The six on-board voltage DACs (DAC1–6) can drive
into the feedback pins of the power modules to be margined.
The simplest circuit to implement this function is an attenua-
tion resistor, which connects the DACn pin to the feedback
node of a dc/dc converter. When the DACn output voltage is set
equal to the feedback voltage, no current flows in the attenua-
tion resistor, and the dc/dc output voltage does not change.
Taking DACn above the feedback voltage forces current into the
feedback node, and the output of the dc/dc converter is forced
to fall to compensate for this. The dc/dc output can be forced
high by setting the DACn output voltage lower than the
feedback node voltage. The series resistor can be split in two,
and the node between them decoupled with a capacitor to
ground. This can help to decouple any noise picked up from the
board. Decoupling to a ground local to the dc/dc converter is
recommended.
0
OUTPUT
CODC/DC
FEEDBACK
GND
ARESISTOR
PCB
ADM1066
DACOUTn
V
OUT
DAC
μ
CONTROLLER
VIN
C(SMBus)
Figure 32. Open-Loop Margining System Using the ADM1066
The ADM1066 can be commanded to margin a supply up or
down over the SMBus by updating the values on the relevant
DAC output.
CLOSED-LOOP SUPPLY MARGINING
A much more accurate and comprehensive method of margin-
ing is to implement a closed-loop system. The voltage on the
rail to be margined can be read back so that the rail can be
accurately margined to the target voltage. The ADM1066
incorporates all the circuits required to do this, with the 12-bit
successive approximation ADC used to read back the level of
the supervised voltages, and the six voltage output DACs,
implemented as described in the Open-Loop Margining section,
used to adjust supply levels. These circuits can be used along
with some other intelligence such as a microcontroller to
implement a closed-loop margining system that allows any
dc/dc or LDO supply to be set to any voltage, accurate to within
±0.5% of the target.
0
OUTPUT
CODC/DC
FEEDBACK
GND
R1
R2
RESISTOR, R3
PCB
VH/VPn/VXn
ADM1066
DACOUTn
MUX
ADC
DAC
CO(SMBus)
μ
CONTROLLER
VIN
Figure 33. Closed-Loop Margining System Using the ADM1066
To implement closed-loop margining:
1.
Disable the six DACn outputs.
2.
Set the DAC output voltage equal to the voltage on the
feedback node.
3.
Enable the DAC.
4.
Read the voltage at the dc/dc output, which is connected to
one of the VP1–4, VH, or VX1–5 pins.
5.
If necessary, modify the DACn output code up or down to
adjust the dc/dc output voltage; otherwise, stop, because
the target voltage has been reached.
6.
Set the DAC output voltage to a value that alters the supply
output by the required amount (for example, ±5%).
7.
Repeat from Step 4.
Steps 1 to 3 ensure that when the DACn output buffer is turned
on it has little effect on the dc/dc output. The DAC output buffer
is designed to power up without glitching by first powering up
the buffer to follow the pin voltage. It does not drive out onto
the pin at this time. Once the output buffer is properly enabled,
the buffer input is switched over to the DAC, and the output
stage of the buffer is turned on. Output glitching is negligible.
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| ADM1066ASUZ | 功能描述:IC SUPERVISOR/SEQUENCER 48-TQFP RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:Super Sequencer® 其它有關文件:STM6905 View All Specifications 標準包裝:1 系列:- 類型:多壓監(jiān)控器 監(jiān)視電壓數(shù)目:5 輸出:開路漏極或開路集電極 復位:低有效 復位超時:最小為 140 ms 電壓 - 閥值:2.188V，2.955V，可調(diào)，可調(diào)，可調(diào) 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:8-TSSOP 包裝:Digi-Reel® 產(chǎn)品目錄頁面:1197 (CN2011-ZH PDF) 其它名稱:497-8728-6 |
| ADM1066ASUZ-REEL | 功能描述:IC SEQUENCER/SUPERVISOR 48TQFP RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:Super Sequencer® 標準包裝:1 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復位:高有效 復位超時:- 電壓 - 閥值:1.8V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:6-TSOP（0.059"，1.50mm 寬）5 引線 供應商設備封裝:5-TSOP 包裝:剪切帶 (CT) 其它名稱:NCP301HSN18T1GOSCT |
| ADM1066ASUZ-REEL7 | 功能描述:IC SEQUENCER/SUPERVISOR 48TQFP RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:Super Sequencer® 標準包裝:1 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復位:高有效 復位超時:- 電壓 - 閥值:1.8V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:6-TSOP（0.059"，1.50mm 寬）5 引線 供應商設備封裝:5-TSOP 包裝:剪切帶 (CT) 其它名稱:NCP301HSN18T1GOSCT |
| ADM1067 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Super Sequencer with Open-Loop Margining DACs |
| ADM1067ACP | 制造商:Analog Devices 功能描述:Sequencer 40-Pin LFCSP EP |
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