參數(shù)資料
型號: ADM1066ACP-REEL
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: Multisupply Supervisor/Sequencer with Margining Control and Auxiliary ADC Inputs
中文描述: 10-CHANNEL POWER SUPPLY SUPPORT CKT, QCC40
封裝: 6 X 6 MM, MO-220VJJD-2, LFCSP-40
文件頁數(shù): 3/32頁
文件大小: 861K
代理商: ADM1066ACP-REEL
ADM1066
GENERAL DESCRIPTION
(continued from Page 1)
Rev. 0 | Page 3 of 32
Supply margining can be performed with a minimum of
external components. The margining loop can be used for in-
circuit testing of a board during production (for example, to
verify the board’s functionality at 5% of nominal supplies),
or can be used dynamically to accurately control the output
voltage of a dc/dc converter.
The device also provides up to ten programmable inputs for
monitoring under, over, or out-of-window faults on up to ten
supplies. In addition, ten programmable outputs can be used as
logic enables. Six of them can also provide up to a 12 V output
for driving the gate of an N-channel FET, which can be placed
in the path of a supply.
The logical core of the device is a sequencing engine. This state-
machine-based construction provides up to 63 different states.
This design enables very flexible sequencing of the outputs,
based on the condition of the inputs.
The device is controlled via configuration data that can be
programmed into an EEPROM. The whole configuration can
be programmed using an intuitive GUI-based software package
provided by ADI.
0
GPI SIGNAL
CONDITIONING
SFD
GPI SIGNAL
CONDITIONING
SFD
SFD
SFD
SELECTABLE
ATTENUATOR
SELECTABLE
ATTENUATOR
DEVICE
CONTROLLER
OSC
EEPROM
SDA SCL
A1
A0
SMBus
INTERFACE
REFOUT
REFIN
AUX1
AUX2
REFGND
VREF
12-BIT
SAR ADC
ADM1066
CONFIGURABLE
O/P DRIVER
(HV)
PDO1
PDO2
PDO3
PDO4
PDO5
PDOGND
DAC1
V
DAC
DAC6
V
DAC
VCCP
GND
DAC2
DAC3
DAC4
DAC5
PDO8
PDO9
CONFIGURABLE
O/P DRIVER
(HV)
PDO6
CONFIGURABLE
O/P DRIVER
(LV)
PDO7
CONFIGURABLE
O/P DRIVER
(LV)
PDO10
SEQUENCING
ENGINE
VX2
VX3
VX4
VP2
VP3
VP4
VH
VP1
VX1
SFDGND
VX5
VDDCAP
VDD
ARBITRATOR
REG 5.25V
CHARGE PUMP
Figure 2. Detailed Block Diagram
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