參數(shù)資料
型號: ADM1065ASU
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: Super Sequencer-TM and Monitor
中文描述: 10-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48
封裝: 7 X 7 MM, PLASTIC, MS-026ABC, TQFP-48
文件頁數(shù): 25/28頁
文件大?。?/td> 497K
代理商: ADM1065ASU
ADM1065
Rev. 0 | Page 25 of 28
0
ASLAVE
S
W A
2
(BLOCK READ)
4
1
3
A
5
S
6
ASLAVE
7
BYTE
9
10
12
11
A
R A
8
D1
D32
13
A
14
P
A
Figure 36. Block Read from EEPROM or RAM
Error Correction
The ADM1065 provides the option of issuing a PEC (packet
error correction) byte after a write to RAM, a write to EEPROM,
a block write to RAM/EEPROM, or a block read from RAM/
EEPROM. This enables the user to verify that the data received
by or sent from the ADM1065 is correct. The PEC byte is an
optional byte sent after that last data byte has been written to or
read from the ADM1065. The protocol is as follows:
1.
The ADM1065 issues a PEC byte to the master. The master
checks the PEC byte and issues another block read, if the
PEC byte is incorrect.
2.
A no acknowledge (NACK) is generated after the PEC byte
to signal the end of the read.
Note that the PEC byte is calculated using CRC-8. The frame
check sequence (FCS) conforms to CRC-8 by the polynomial
C
(
x
) =
x
8
+
x
2
+
x
1
+ 1
See the SMBus 1.1 specification for details.
An example of a block read with the optional PEC byte is
shown in Figure 37.
0
ASLAVE
S
W A
2
(BLOCK READ)
4
1
3
A
5
S
6
ASLAVE
7
BYTE
9
10
12
11
A
R A
8
D1
D32
A
13
PEC
14
A
15
P
A
Figure 37. Block Read from EEPROM or RAM with PEC
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