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參數(shù)資料
| 型號： | ADM1064 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Super Sequencer with Voltage Readback ADC |
| 中文描述： | 超級序列與ADC的電壓回讀 |
| 文件頁數(shù)： | 27/32頁 |
| 文件大?。?/td> | 523K |
| 代理商： | ADM1064 |
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ADM1064
5.
Rev. 0 | Page 27 of 32
The slave asserts ACK on SDA.
6.
The master sends a data byte that tells the slave device how
many data bytes are being sent. The SMBus specification
allows a maximum of 32 data bytes in a block write.
7.
The slave asserts ACK on SDA.
8.
The master sends N data bytes.
9.
The slave asserts ACK on SDA after each data byte.
10.
The master asserts a stop condition on SDA to end the
transaction.
0
SLAVE
ADDRESS
S
W A
2
COMMAND 0xFC
(BLOCK WRITE)
4
1
3
A
5
BYTE
COUNT
6
A
7
A
9
10
A
P
A
DATA
1
8
DATA
N
DATA
2
Figure 39. Block Write to EEPROM or RAM
Unlike some EEPROM devices that limit block writes to within
a page boundary, there is no limitation on the start address
when performing a block write to EEPROM, except
There must be at least N locations from the start address to
the highest EEPROM address (0xFBFF), to avoid writing to
invalid addresses.
If the addresses cross a page boundary, both pages must be
erased before programming.
Note that the ADM1064 features a clock extend function for
writes to EEPROM. Programming an EEPROM byte takes
approximately 250 μs, which would limit the SMBus clock for
repeated or block write operations. The ADM1064 pulls SCL
low and extends the clock pulse when it cannot accept any
more data.
READ OPERATIONS
The ADM1064 uses the following SMBus read protocols.
Receive Byte
In a receive byte operation, the master device receives a single
byte from a slave device, as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
read bit (high).
3.
The addressed slave device asserts ACK on SDA.
4.
The master receives a data byte.
5.
The master asserts no acknowledge on SDA.
6.
The master asserts a stop condition on SDA, and the
transaction ends.
In the ADM1064, the receive byte protocol is used to read a
single byte of data from a RAM or EEPROM location whose
address has previously been set by a send byte or write
byte/word operation, as shown in Figure 40.
0
2
3
1
4
5
SLAVE
ADDRESS
S
R
DATA
P
A
6
A
Figure 40. Single Byte Read from EEPROM or RAM
Block Read
In a block read operation, the master device reads a block of
data from a slave device. The start address for a block read must
have been set previously. In the ADM1064, this is done by a
send byte operation to set a RAM address, or a write byte/word
operation to set an EEPROM address. The block read operation
itself consists of a send byte operation that sends a block read
command to the slave, immediately followed by a repeated start
and a read operation that reads out multiple data bytes, as
follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts ACK on SDA.
4.
The master sends a command code that tells the slave
device to expect a block read. The ADM1064 command
code for a block read is 0xFD (1111 1101).
5.
The slave asserts ACK on SDA.
6.
The master asserts a repeat start condition on SDA.
7.
The master sends the 7-bit slave address followed by the
read bit (high).
8.
The slave asserts ACK on SDA.
9.
The ADM1064 sends a byte-count data byte that tells the
master how many data bytes to expect. The ADM1064
always returns 32 data bytes (0x20), which is the maximum
allowed by the SMBus 1.1 specification.
10.
The master asserts ACK on SDA.
11.
The master receives 32 data bytes.
12.
The master asserts ACK on SDA after each data byte.
13.
The master asserts a stop condition on SDA to end the
transaction.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADM1064ACP | Super Sequencer with Voltage Readback ADC |
| ADM1064ACP-REEL | Super Sequencer with Voltage Readback ADC |
| ADM1064ACP-REEL7 | Super Sequencer with Voltage Readback ADC |
| ADM1064ASU | Super Sequencer with Voltage Readback ADC |
| ADM1064ASU-REEL | Super Sequencer with Voltage Readback ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADM1064ACP | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 40-Pin LFCSP EP |
| ADM1064ACP-REEL | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 40-Pin LFCSP EP T/R |
| ADM1064ACP-REEL7 | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 40-Pin LFCSP EP T/R |
| ADM1064ACPZ | 功能描述:IC SEQUENCER/SUPERVISOR 40-LFCSP RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:Super Sequencer® 標(biāo)準(zhǔn)包裝:1 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復(fù)位:高有效 復(fù)位超時:- 電壓 - 閥值:1.8V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:6-TSOP（0.059"，1.50mm 寬）5 引線 供應(yīng)商設(shè)備封裝:5-TSOP 包裝:剪切帶 (CT) 其它名稱:NCP301HSN18T1GOSCT |
| ADM1064ASU | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 48-Pin TQFP |
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