VDD Most positive power supply potent" />
參數(shù)資料
型號(hào): ADG722BRM
廠商: Analog Devices Inc
文件頁(yè)數(shù): 14/16頁(yè)
文件大小: 0K
描述: IC SWITCH DUAL SPST 8MSOP
產(chǎn)品培訓(xùn)模塊: Switch Fundamentals
產(chǎn)品變化通告: Product Discontinuance 27/Oct/2011
標(biāo)準(zhǔn)包裝: 50
功能: 開(kāi)關(guān)
電路: 2 x SPST - NC
導(dǎo)通狀態(tài)電阻: 4 歐姆
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V
電流 - 電源: 1nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 管件
Data Sheet
ADG721/ADG722/ADG723
Rev. E | Page 7 of 16
TERMINOLOGY
VDD
Most positive power supply potential.
GND
Ground (0 V) reference.
S
Source terminal. May be an input or output.
D
Drain terminal. May be an input or output.
IN
Logic control input.
RON
Ohmic resistance between D and S.
RON
On resistance match between any two channels, that is,
RON max RON min.
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
IS (OFF)
Source leakage current with the switch off.
ID (OFF)
Drain leakage current with the switch off.
ID, IS (ON)
Channel leakage current with the switch on.
VD (VS)
Analog voltage on the D and S terminals.
CS (OFF)
Off switch source capacitance.
CD (OFF)
Off switch drain capacitance.
CD, CS (ON)
On switch capacitance.
tON
Delay between applying the digital control input and the output
switching on.
tOFF
Delay between applying the digital control input and the output
switching off.
tD
Off time or on time measured between the 90% points of both
switches, when switching from one address state to another
(ADG723 only).
Crosstalk
A measure of unwanted signal that is the result of parasitic
capacitance.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Charge Injection
A measure of the glitch impulse transferred during switching.
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