參數(shù)資料
型號(hào): ADG721
廠商: Analog Devices, Inc.
英文描述: CMOS Low Voltage 4 ohm Dual SPST Switches
中文描述: CMOS低電壓4歐姆雙路SPST開(kāi)關(guān)
文件頁(yè)數(shù): 4/8頁(yè)
文件大?。?/td> 204K
代理商: ADG721
ADG721/ADG722/ADG723
–4–
REV. 0
ORDERING GUIDE
Model
Temperature Range
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
Brand*
Package Description
μ
SOIC
μ
SOIC
μ
SOIC
Package Option
ADG721BRM
ADG722BRM
ADG723BRM
S6B
S7B
S8B
RM-8
RM-8
RM-8
*Brand = Due to package size limitations, these three characters represent the part number.
PIN CONFIGURATION
8-Lead
m
SOIC (RM-8)
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
S1
D1
IN2
GND
V
DD
IN1
D2
S2
ADG721/
722/723
Table I. Truth Table (ADG721/ADG722)
ADG721 In
ADG722 In
Switch Condition
0
1
1
0
OFF
ON
Table II. Truth Table (ADG723)
Logic
Switch 1
Switch 2
0
1
OFF
ON
ON
OFF
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG721/ADG722/ADG723 features proprietary ESD protection circuitry, per-
manent damage may occur on devices subjected to high energy electrostatic discharges. There-
fore, proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25
°
C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog, Digital Inputs
2
. . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
Storage Temperature Range . . . . . . . . . . . . . –65
°
C to +150
°
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150
°
C
μ
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206
°
C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44
°
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215
°
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220
°
C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maxi-
mum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
TERMINOLOGY
V
DD
GND
S
D
IN
R
ON
R
ON
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input.
Ohmic resistance between D and S.
On resistance match between any two channels
i.e., R
ON
max – R
ON
min.
Flatness is defined as the difference between the
maximum and minimum value of on resistance as
measured over the specified analog signal range.
Source leakage current with the switch “OFF.”
Drain leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
Analog voltage on terminals D, S.
“OFF” Switch Source Capacitance.
“OFF” Switch Drain Capacitance.
C
D
, C
S
(ON) “ON” Switch Capacitance.
t
ON
Delay between applying the digital control input
and the output switching on.
t
OFF
Delay between applying the digital control input
and the output switching off.
t
D
“OFF” time or “ON” time measured between the
90% points of both switches, When switching
from one address state to another. (ADG723 Only)
Crosstalk
A measure of unwanted signal which is coupled
through from one channel to another as a result
of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through
an “OFF” switch.
Charge
A measure of the glitch impulse transferred
Injection
during switching.
R
FLAT(ON)
I
S
(OFF)
I
D
(OFF)
I
D
, I
S
(ON)
V
D
(V
S
)
C
S
(OFF)
C
D
(OFF)
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