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參數(shù)資料
| 型號(hào)： | ADG528FBP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | 4/8 Channel Fault-Protected Analog Multiplexers |
| 中文描述： | 8-CHANNEL, SGL ENDED MULTIPLEXER, PQCC20 |
| 封裝： | PLASTIC, MO-047AA, LCC-20 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 170K |
| 代理商： | ADG528FBP |
ADG508F/ADG509F/ADG528F
Typical Performance Graphs
REV. C
–5–
TERMINOLOGY
V
DD
V
SS
GND
R
ON
R
ON
Drift
Most positive power supply potential.
Most negative power supply potential.
Ground (0 V) reference.
Ohmic resistance between D and S.
Change in R
ON
when temperature changes
by one degree Celsius.
Difference between the R
ON
of any two
channels.
Source leakage current when the switch is
off.
Drain leakage current when the switch is off.
Channel leakage current when the switch is
on.
Analog voltage on terminals D, S.
Channel input capacitance for “OFF”
condition.
Channel output capacitance for “OFF”
condition.
“ON” switch capacitance.
Digital input capacitance.
Delay time between the 50% and 90% points
of the digital input and switch “ON”
condition.
Delay time between the 50% and 90% points
of the digital input and switch “OFF”
condition.
Delay time between the 50% and 90% points
of the digital inputs and the switch “ON”
condition when switching from one address
state to another.
“OFF” time measured between 80% points of
both switches when switching from one
address state to another.
Maximum input voltage for Logic “0”.
Minimum input voltage for Logic “1”.
Input current of the digital input.
A measure of unwanted signal coupling
through an “OFF” channel.
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
Positive supply current.
Negative supply current.
R
ON
Match
I
S
(OFF)
I
D
(OFF)
I
D
, I
S
(ON)
V
D
(V
S
)
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
C
IN
t
ON
(EN)
t
OFF
(EN)
t
TRANSITION
t
OPEN
V
INL
V
INH
I
INL
(I
INH
)
Off Isolation
Charge Injection
I
DD
I
SS
2000
1000
0
–15
–5
15
5
0
10
–10
500
1750
1500
1250
750
250
V
D
(V
S
) – Volts
R
O
V
T
A
= +25
8
C
V
DD
= +5V
V
SS
= –5V
V
DD
= +10V
V
SS
= –10V
V
DD
= +15V
V
SS
= –15V
Figure 3. On Resistance as a Function of V
D
(V
S
)
1m
1
m
1p
–50
–30
50
10
–20
V
IN
– INPUT VOLTAGE – Volts
20
–40
1n
30
40
100
m
10
m
10n
100n
10p
100p
–10
0
I
S
V
DD
= 0V
V
SS
= 0V
V
D
= 0V
60
OPERATING RANGE
Figure 4. Input Leakage Current as a Function of V
S
(Power Supplies OFF) During Overvoltage Conditions
1m
1
m
1p–50
–30
50
10
–20
V
IN
– INPUT VOLTAGE – Volts
20
–40
1n
30
40
100
m
10
m
10n
100n
10p
100p
–10
0
I
D
V
DD
= +15V
V
SS
= –15V
V
D
= 0V
60
OPERATING RANGE
Figure 5. Output Leakage Current as a Function of V
S
(Power Supplies ON) During Overvoltage Conditions
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