參數(shù)資料
型號: ADG512TQ
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: LC2MOS Precision 5 V/3 V Quad SPST Switches
中文描述: QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, CDIP16
封裝: GLASS SEALED, CERDIP-16
文件頁數(shù): 6/11頁
文件大?。?/td> 124K
代理商: ADG512TQ
ADG511/ADG512/ADG513
REV. B
–6–
PIN CONFIGURATION
(DIP/SOIC)
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN1
D1
S1
V
SS
GND
S4
D4
IN4
IN2
D2
S2
V
DD
NC
S3
D3
IN3
ADG511
ADG512
ADG513
NC = NO CONNECT
Truth Table (ADG511/ADG512)
ADG511
In
ADG512
In
Switch
Condition
0
1
1
0
ON
OFF
Truth Table (ADG513)
Switch
1, 4
Switch
2, 3
Logic
0
1
OFF
ON
ON
OFF
TERMINOLOGY
V
DD
V
SS
Most positive power supply potential.
Most negative power supply potential in
dual supplies. In single supply applications,
it may be connected to GND.
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Ohmic resistance between D and S.
Source leakage current with the switch
“OFF.”
Drain leakage current with the switch
“OFF.”
Channel leakage current with the switch
“ON.”
Analog voltage on terminals D, S.
“OFF” switch source capacitance.
“OFF” switch drain capacitance.
“ON” switch capacitance.
Delay between applying the digital control
input and the output switching on.
Delay between applying the digital control
input and the output switching off.
“OFF” or “ON” time measured between the
90% points of both switches when switching
from one address state to another.
A measure of unwanted signal which is
coupled through from one channel to an-
other as a result of parasitic capacitance.
A measure of unwanted signal coupling
through an “OFF” switch.
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
GND
S
D
IN
R
ON
I
S
(OFF)
I
D
(OFF)
I
D
, I
S
(ON)
V
D
(V
S
)
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
t
ON
t
OFF
t
D
Crosstalk
Off Isolation
Charge Injection
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參數(shù)描述
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