參數(shù)資料
型號: ADG333
廠商: Analog Devices, Inc.
英文描述: Quad SPDT Switch
中文描述: 四路SPDT開關(guān)
文件頁數(shù): 2/8頁
文件大小: 124K
代理商: ADG333
ADG333A–SPECIFICATIONS
1
DUAL SUPPLY
(V
DD
= +15 V, V
SS
= –15 V, GND = 0 V, unless otherwse noted)
–40
8
C to
+85
8
C
Parameter
+25
8
C
Units
T est Conditions/Comments
ANALOG SWIT CH
Analog Signal Range
R
ON
V
SS
to V
DD
V
typ
max
max
max
20
45
V
D
=
±
10 V, I
S
= –1 mA
45
5
4
R
ON
R
ON
Match
V
D
=
±
5 V, I
S
= –10 mA
V
D
=
±
10 V, I
S
= –10 mA
LEAK AGE CURRENT S
Source OFF Leakage I
S
(OFF)
V
DD
= +16.5 V, V
SS
= –16.5 V
V
D
=
±
15.5 V, V
S
=
+
15.5 V
T est Circuit 2
V
S
= V
D
=
±
15.5 V
T est Circuit 3
±
0.1
±
0.25
±
0.1
±
0.4
nA typ
nA max
nA typ
nA max
±
3
Channel ON Leakage I
D
, I
S
(ON)
±
5
DIGIT AL INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
2.4
0.8
V min
V max
±
0.005
±
0.5
μ
A typ
μ
A max
V
IN
= 0 V or V
DD
DYNAMIC CHARACT ERIST ICS
2
t
ON
90
ns typ
ns max
ns typ
ns max
ns min
R
L
= 300
, C
L
= 35 pF;
V
S
=
±
10 V; T est Circuit 4
R
L
= 300
, C
L
= 35 pF;
V
S
=
±
10 V; T est Circuit 4
R
L
= 300
, C
L
= 35 pF;
V
S
= +5 V; T est Circuit 5
V
D
= 0 V, R
D
= 0
, C
L
= 10 nF;
V
DD
= +15 V, V
SS
= –15 V; T est Circuit 6
R
L
= 75
, C
L
= 5 pF, f = 1 MHz;
V
S
= 2.3 V
rms, T est Circuit 7
R
L
= 75
, C
L
= 5 pF, f = 1 MHz;
V
S
= 2.3 V rms,
T est Circuit 8
175
t
OFF
80
145
Break-Before-Make Delay, t
OPEN
10
Charge Injection
2
10
72
pC typ
pC max
dB typ
OFF Isolation
Channel-to-Channel Crosstalk
85
dB typ
C
S
(OFF)
C
D
, C
S
(ON)
5
20
pF typ
pF typ
POWER REQUIREMENT S
I
DD
0.05
0.25
0.01
1
mA typ
mA max
μ
A typ
μ
A max
V min/V max |V
DD
| = |V
SS
|
Digital Inputs = 0 V or 5 V
0.35
I
SS
5
±
3/
±
20
V
DD
/V
SS
NOT ES
1
T emperature range is as follows: B Version: –40
°
C to +85
°
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
–2–
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