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參數(shù)資料
| 型號： | ADG3301BKSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XLATR BIDIR V-LVL SC70-6 |
| 標(biāo)準(zhǔn)包裝： | 10,000 |
| 邏輯功能： | 變換器，雙向 |
| 位數(shù)： | 1 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 數(shù)據(jù)速率： | 50Mbps |
| 通道數(shù)： | 1 |
| 輸出/通道數(shù)目： | 1 |
| 差分 - 輸入:輸出： | 無/無 |
| 傳輸延遲（最大）： | 6ns |
| 電源電壓： | 1.15 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 6-TSSOP，SC-88，SOT-363 |
| 供應(yīng)商設(shè)備封裝： | SC-70 |
| 包裝： | 帶卷 (TR) |
ADG3301
Rev. 0 | Page 15 of 20
TERMINOLOGY
VIHA
Logic input high voltage at Pin A.
VILA
Logic input low voltage at Pin A.
VOHA
Logic output high voltage at Pin A.
VOLA
Logic output low voltage at Pin A.
CA
Capacitance measured at Pin A (EN = 0).
ILA, HiZ
Leakage current at Pin A when EN = 0 (Pin A three-stated).
VIHY
Logic input high voltage at Pin Y.
VILY
Logic input low voltage at Pin Y.
VOHY
Logic output high voltage at Pin Y.
VOLY
Logic output low voltage at Pin Y.
CY
Capacitance measured at Pin Y (EN = 0).
ILY, HiZ
Leakage current at pin and when EN = 0 (Pin A three-stated).
VIHEN
Logic input high voltage at the EN pin.
VILEN
Logic input low voltage at the EN pin.
CEN
Capacitance measured at EN pin.
ILEN
Enable (EN) pin leakage current.
tEN
Three-state enable time for Pin A and Pin Y.
tP, A→Y
Propagation delay when translating logic levels in the A→Y
direction.
tR, A→Y
Rise time when translating logic levels in the A→Y direction.
tF, A→Y
Fall time when translating logic levels in the A→Y direction.
DMAX, A→Y
Guaranteed data rate when translating logic levels in the A→Y
direction under the driving and loading conditions specified in
tPPSKEW, A→Y
Difference in propagation delay between any one channel and
the same channel on a different part (under same
driving/loading conditions) when translating in the A→Y
direction.
tP, Y→A
Propagation delay when translating logic levels in the Y→A
direction.
tR, Y→A
Rise time when translating logic levels in the Y→A direction.
tF, Y→A
Fall time when translating logic levels in the Y→ A direction.
DMAX, Y→A
Guaranteed data rate when translating logic levels in the Y→A
direction under the driving and loading conditions specified in
tPPSKEW, Y→A
Difference in propagation delay between any one channel and
the same channel on a different part (under the same driving/
loading conditions) when translating in the Y→A direction.
ICCA
VCCA supply current.
ICCY
VCCY supply current.
IHiZA
VCCA supply current during three-state mode (EN = 0).
IHiZY
VCCY supply current during three-state mode (EN = 0).
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| ADG3301BKSZ-REEL7 | 功能描述:TRANSLATOR SGL LL BIDIR SC70-6 RoHS:是 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:100ELT 邏輯功能:變換器 位數(shù):1 輸入類型:TTL 輸出類型:差分 數(shù)據(jù)速率:- 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無/是 傳輸延遲（最大）:0.6ns 電源電壓:3 V ~ 3.8 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:Digi-Reel® 產(chǎn)品目錄頁面:1088 (CN2011-ZH PDF) 其它名稱:576-1360-6 |
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| ADG3304_13 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Voltage, 1.15 V to 5.5 V, 4-Channel, Bidirectional Logic Level Translator |
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| ADG3304BCB-REEL7 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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