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參數(shù)資料
| 型號： | ADE7752BARW-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Polyphase Energy Metering IC with Pulsed Output |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | MS-013AD, SOIC-24 |
| 文件頁數(shù)： | 23/27頁 |
| 文件大?。?/td> | 342K |
| 代理商： | ADE7752BARW-RL |
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Preliminary Technical Data
ADE7752B
Example 3
In this example, the ADE7752B is connected to a 3-phase 3-
wire delta service as shown in Figure 21. The total active energy
calculation processed in the ADE7752B can be expressed as
Rev. PrA | Page 23 of 27
Total Active Power
= (
V
A
–
V
C
) ×
I
A
+ (
V
B
–
V
C
) ×
I
B
where:
V
A
,
V
B
, and
V
C
represent the voltage on phase A, phase B, and
phase C, respectively.
I
A
and I
B
represent the current on phase A and phase B,
respectively.
As the voltage and current inputs respect Equations 5 and 6, the
total active power (
P
) is
(
) (
(
cos
2
t
I
l
A
)
(
) (
×
)
)
(
)
π
3
+
ω
×
×
×
π
3
+
ω
×
×
π
3
+
ω
×
×
+
ω
×
×
×
π
3
+
ω
×
×
ω
×
×
=
+
=
2
cos
2
4
cos
2
2
cos
2
4
cos
2
cos
2
t
I
t
V
v
t
V
t
V
t
V
P
IBN
IBP
VC
VB
IAN
IAP
VC
VA
P
l
B
l
C
l
B
l
C
l
A
(15)
For simplification, assume that
Φ
A
=
Φ
B
=
Φ
C
= 0 and
V
A
=
V
B
=
V
C
=
V
. The preceding equation becomes
(
)
(
)
π
3
+
ω
×
π
+
ω
×
×
×
×
+
ω
×
π
3
+
ω
×
2
×
×
×
=
2
cos
sin
3
sin
2
cos
2
sin
3
sin
2
t
t
I
V
t
t
I
V
P
l
l
B
l
l
A
(16)
P
then becomes
π
3
+
ω
+
×
×
+
π
3
+
ω
+
2
×
×
=
2
sin
3
sin
2
2
sin
3
sin
t
I
VBN
t
I
VAN
P
l
B
l
A
(17)
where:
VAN
=
V
× sin(2π/3).
VBN
=
V
× sin(π/3).
As the LPF on each channel eliminates the 2
ω
l
component of
the equation, the active power measured by the ADE7752B is
2
3
2
3
×
×
+
×
×
=
B
BN
A
AN
I
V
I
V
P
(18)
If full-scale ac voltage of ±500 mV peak is applied to the voltage
channels and current channels, the expected output frequency
is calculated as follows:
value
reference
nominal
V
4
V
0
IC
V
rms
V
2
5
ac
peak
V
m
500
IC
IB
IA
V
V
1
1
S
0
S
SCF
,
Hz
60
.
F
REF
CN
BN
AN
7
1
=
=
=
=
=
=
=
=
=
=
=
=
=
(19)
Note that if the on-chip reference is used, actual output
frequencies can vary from device to device due to reference
tolerance of ±8%.
Hz
139
.
2
3
4
2
2
60
.
2
5
×
5
×
181
.
2
Freq
=
×
×
×
×
×
=
(20)
Table 6 shows a complete listing of all maximum output
frequencies when using all three channel inputs.
Table 6: Maximum Output Frequency on F1 and F2
SCF
S1
S0
Inputs (Hz)
0
0
0
0.93
1
0
1
1.86
0
0
1
0.46
1
0
1
1.86
0
1
0
2.10
1
1
0
0.46
0
1
1
0.23
1
1
1
0.23
Maximum
Frequency for AC
Maximum
Frequency for DC
Inputs (Hz)
1.85
3.71
0.93
3.71
4.20
0.93
0.47
0.47
FREQUENCY OUTPUT CF
The pulse output calibration frequency (CF) is intended for use
during calibration. The output pulse rate on CF can be up to 64×
the pulse rate on F1 and F2. Table 7 shows how the two
frequencies are related, depending on the states of the logic
inputs S0, S1, and SCF. Because of its relatively high pulse rate,
the frequency at this logic output is proportional to the
instantaneous active power. As is the case with F1 and F2, the
frequency is derived from the output of the low-pass filter after
multiplication. However, since the output frequency is high, this
active power information is accumulated over a much shorter
time. Thus, less averaging is carried out in the digital-to-
frequency conversion. The CF output is much more responsive
to power fluctuations with much less averaging of the active
power signal (see Figure 15).
Table 7. Maximum Output Frequency on CF
SCF
S1
S0
F
1–7
(Hz)
CF Maximum for AC Signals (Hz)
0
0
0
2.3
16 × F1, F2 = 14.88
1
0
0
4.61
8 × F1, F2 = 14.88
0
0
1
1.15
32 × F1, F2 = 14.88
1
0
1
4.61
16 × F1, F2 = 29.76
0
1
0
5.22
160 × F1, F2 = 336
1
1
0
1.15
16 × F1, F2 = 7.36
0
1
1
0.58
32 × F1, F2 = 7.36
1
1
1
0.58
16 × F1, F2 = 3.68
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