參數(shù)資料
型號(hào)： ADDC02808PBKV
廠商： ANALOG DEVICES INC
元件分類： 基準(zhǔn)電壓源/電流源
英文描述： 28 V, 200 W Pulsed DC/DC Converter with Integral EMI Filter
中文描述： 3-OUTPUT 200 W DC-DC REG PWR SUPPLY MODULE
封裝： HERMETIC SEALED PACKAGE-17
文件頁(yè)數(shù)： 8/20頁(yè)
文件大?。?/td> 287K
代理商： ADDC02808PBKV
ADDC02808PB
REV. A
–8–
PULSEWIDTH – ms
P
250
200
00
150
50
100
150
100
50
MAXIMUM PEAK
POWER LIMIT
MAXIMUM CONTINUOUS
POWER LIMIT
100W ave
50W ave
10W ave
25
75
125
Figure 17. Largest On-State Power vs. Pulsewidth that
Maintains T
JMAX
≤
110
°
C at 90
°
C Baseplate
TRANSIENT RESPONSE
The standard ADDC02808PB is designed to deliver large
changes, or pulses, in load current with minimum output volt-
age deviation and an ultrafast return to the nominal output
voltage. The compensation of the feedback loop is optimized,
and output stability is insured, for a broad range of external load
capacitance extending from 500
μ
F (R
ESR
= 20 m
) to 4,000
μ
F
(R
ESR
= 2.5 m
). The variables that impact pulse performance
(the maximum output voltage deviation and the settling time)
are:
1. Size of step change in the output current.
2. Amount of external load capacitance.
3. Internal compensation of the feedback loop (factory set).
4. Connection from converter output to load.
Extensive modeling of the converter with ADI proprietary soft-
ware permits analysis and prediction of the impact each of these
parameters has on the pulse response. The analyses in this data
sheet are based on the load capacitance being comprised of
100
μ
F, 100 m
tantalum load capacitors such as the CSR21
style. Figure 18 is the prediction of the standard converter’s
response to a 24 A step change in load current (from 1 A to
25 A) with a load capacitance of 1,000
μ
F (R
ESR
= 10 m
).
This is very close to the measured pulse response under the
same conditions shown in Figure 6.
8.1
7.4
–200
800
–100
V
O
0
100
200
300
400
500
600
700
8
7.9
7.8
7.7
7.6
7.5
TIME –
m
s
Figure 18. Predicted Response to 24 A Step Change in
Load Current, di/dt = 12 A/
μ
s, for C
LOAD
= 1,000
μ
F and
R
ESR
= 10 m
8.1
7.4
–200
800
–100
V
O
0
100
200
300
400
500
600
700
8
7.9
7.8
7.7
7.6
7.5
TIME –
m
s
12A STEP CHANGE
24A STEP CHANGE
Figure 19. Predicted Response to 12 A and 24 A Step
Change in Load Current, di/dt = 12 A/
μ
s, for C
LOAD
=
1000
μ
F and R
ESR
= 10 m
Step Change
If the step change is less than 24 A, the pulse response will
improve. For instance, with a 12 A step change, Figure 19
shows a comparison of the response for a 24 A step change and
a 12 A step change in load.
Load Capacitance
Varying the external load capacitance and associated R
ESR
be-
tween the range of C
LOAD
= 500
μ
F (R
ESR
= 20 m
) and C
LOAD
= 4,000
μ
F (R
ESR
= 2.5 m
) results in the predicted waveforms
shown in Figures 20, 21, and 22. As can be seen, the larger the
capacitor, the smaller the deviation, but the longer the settling
time. Table I lists the maximum output voltage deviations and
settling times for the four combinations of C
LOAD
and R
ESR
mentioned above. Note that these are based on the standard
compensation for the feedback loop.
Table I. Output Response to a 24 A (1 A–25 A) Step in Load
Current (Standard Compensation)
Typical
Deviation
Settling Time
(Within 1%)
150
μ
s
175
μ
s
200
μ
s
250
μ
s
See
Figure
C
LOAD
500
μ
F
1,000
μ
F
2,000
μ
F
4,000
μ
F
R
ESR
20 m
10 m
5 m
2.5 m
–7%
–6%
–5%
–4%
20
18
21
22
8.1
7.4
–200
800
–100
V
O
0
100
200
300
400
500
600
700
8
7.9
7.8
7.7
7.6
7.5
TIME –
m
s
Figure 20. Predicted Response for 24 A Step Load
Change in Load Current, di/dt = 12 A/
μ
s, for C
LOAD
= 500
μ
F and R
ESR
= 20 m
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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ADDC02812DAKV 制造商:AD 制造商全稱:Analog Devices 功能描述:28 V/100 W DC/DC Converters with Integral EMI Filter
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