參數(shù)資料
型號(hào): ADCMP600
廠商: Analog Devices, Inc.
英文描述: Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
中文描述: 軌到軌,速度非???,2.5 V至5.5 V,單電源TTL / CMOS比較
文件頁(yè)數(shù): 5/16頁(yè)
文件大?。?/td> 274K
代理商: ADCMP600
ADCMP600/ADCMP601/ADCMP602
TIMING INFORMATION
Figure 2 illustrates the ADCMP600/ADCMP601/ADCMP602 latch timing relationships. Table 2 provides definitions of the terms shown
in Figure 2.
Rev. 0 | Page 5 of 16
1.1V
50%
V
N
± V
OS
DIFFERENTIAL
INPUT VOLTAGE
LATCH ENABLE
Q OUTPUT
t
H
t
PDL
t
PLOH
t
F
V
IN
V
OD
t
S
t
PL
0
Figure 2. System Timing Diagram
Table 2. Timing Descriptions
Symbol
Timing
t
PDH
Input to output high delay
Description
Propagation delay measured from the time the input signal crosses the reference (± the
input offset voltage) to the 50% point of an output low-to-high transition.
Propagation delay measured from the time the input signal crosses the reference (± the
input offset voltage) to the 50% point of an output high-to-low transition.
Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output low-to-high transition.
Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output high-to-low transition.
Minimum time after the negative transition of the latch enable signal that the input signal
must remain unchanged to be acquired and held at the outputs.
Minimum time that the latch enable signal must be high to acquire an input signal change.
Minimum time before the negative transition of the latch enable signal occurs that an
input signal change must be present to be acquired and held at the outputs.
Amount of time required to transition from a low to a high output as measured at the 20%
and 80% points.
Amount of time required to transition from a high to a low output as measured at the 20%
and 80% points.
Difference between the input voltages V
A
and V
B
.
t
PDL
Input to output low delay
t
PLOH
Latch enable to output high delay
t
PLOL
Latch enable to output low delay
t
H
Minimum hold time
t
PL
t
S
Minimum latch enable pulse width
Minimum setup time
t
R
Output rise time
t
F
Output fall time
V
OD
Voltage overdrive
相關(guān)PDF資料
PDF描述
ADCMP600BKSZ-R2 Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
ADCMP600BKSZ-REEL7 Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
ADCMP600BKSZ-RL Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
ADCMP600BRJZ-R2 Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
ADCMP600BRJZ-REEL7 Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADCMP600_11 制造商:AD 制造商全稱:Analog Devices 功能描述:Rail-to-Rail, Very Fast, 2.5 V to 5.5 V
ADCMP600BKSZ-R2 功能描述:IC COMP TTL/CMOS 1CHAN SC70-5 RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS,推挽式,滿擺幅,TTL 電壓 - 電源,單路/雙路(±):2.5 V ~ 5.5 V,±1.25 V ~ 2.75 V 電壓 - 輸入偏移(最小值):5mV @ 5.5V 電流 - 輸入偏壓(最小值):1pA @ 5.5V 電流 - 輸出(標(biāo)準(zhǔn)):- 電流 - 靜態(tài)(最大值):24µA CMRR, PSRR(標(biāo)準(zhǔn)):80dB CMRR,80dB PSRR 傳輸延遲(最大):450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA,CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586
ADCMP600BKSZ-REEL7 功能描述:IC COMP TTL/CMOS 1CHAN SC70-5 RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:帶電壓基準(zhǔn) 元件數(shù):4 輸出類型:開(kāi)路漏極 電壓 - 電源,單路/雙路(±):2.5 V ~ 11 V,±1.25 V ~ 5.5 V 電壓 - 輸入偏移(最小值):10mV @ 5V 電流 - 輸入偏壓(最小值):- 電流 - 輸出(標(biāo)準(zhǔn)):0.015mA @ 5V 電流 - 靜態(tài)(最大值):8.5µA CMRR, PSRR(標(biāo)準(zhǔn)):80dB CMRR,80dB PSRR 傳輸延遲(最大):- 磁滯:- 工作溫度:0°C ~ 70°C 封裝/外殼:16-SOIC(0.154",3.90mm 寬) 安裝類型:表面貼裝 包裝:管件 產(chǎn)品目錄頁(yè)面:1386 (CN2011-ZH PDF)
ADCMP600BKSZ-RL 功能描述:IC COMP TTL/CMOS 1CHAN SC70-5 RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 標(biāo)準(zhǔn)包裝:25 系列:- 類型:帶電壓基準(zhǔn) 元件數(shù):4 輸出類型:CMOS,開(kāi)路漏極,TTL 電壓 - 電源,單路/雙路(±):2 V ~ 11 V,±1 V ~ 5.5 V 電壓 - 輸入偏移(最小值):10mV @ 5V 電流 - 輸入偏壓(最小值):- 電流 - 輸出(標(biāo)準(zhǔn)):0.015mA @ 5V 電流 - 靜態(tài)(最大值):8.5µA CMRR, PSRR(標(biāo)準(zhǔn)):80dB CMRR,80dB PSRR 傳輸延遲(最大):12µs 磁滯:50mV 工作溫度:0°C ~ 70°C 封裝/外殼:16-DIP(0.300",7.62mm) 安裝類型:通孔 包裝:管件
ADCMP600BRJZ 制造商:Analog Devices 功能描述:COMPARATOR RAILRAIL 3.5NS 5SOT23 制造商:Analog Devices 功能描述:COMPARATOR, RAILRAIL, 3.5NS, 5SOT23