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參數(shù)資料
| 型號(hào)： | ADCMP563BRQZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COMPARATOR ECL DUAL 16QSOP |
| 標(biāo)準(zhǔn)包裝： | 98 |
| 類型： | 帶鎖銷 |
| 元件數(shù)： | 2 |
| 輸出類型： | 補(bǔ)充型，差分，ECL，開路發(fā)射極 |
| 電壓 - 電源，單路/雙路(±)： | ±4.75 V ~ 5.25 V |
| 電壓 - 輸入偏移（最小值）： | 2mV @ -5.2V，5V |
| 電流 - 輸入偏壓（最小值）： | 3µA @ -5.2V，5V |
| 電流 - 輸出（標(biāo)準(zhǔn)）： | 30mA |
| 電流 - 靜態(tài)（最大值）： | 5mA，25mA |
| CMRR, PSRR（標(biāo)準(zhǔn)）： | 80dB CMRR，85dB PSRR |
| 傳輸延遲（最大）： | 0.83ns |
| 磁滯： | ±1mV |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 764 (CN2011-ZH PDF) |
| 配用： | EVAL-ADCMP563BRQZ-ND - BOARD EVALUATION ADCMP563BRQZ |
ADCMP563/ADCMP564
Rev. C | Page 12 of 16
Propagation delay dispersion is important in critical timing
applications such as ATE, bench instruments, and nuclear
instrumentation. Overdrive dispersion is defined as the varia-
tion in propagation delay as the input overdrive conditions are
changed (Figure 21). For the ADCMP563/ADCMP564, over-
drive dispersion is typically 75 ps as the overdrive is changed
from 100 mV to 1.5 V. This specification applies for both
positive and negative overdrive because the ADCMP563 and
the ADCMP564 have equal delays for positive and negative
going inputs.
Q OUTPUT
INPUT VOLTAGE
1.5V OVERDRIVE
20mV OVERDRIVE
DISPERSION
VREF ± VOS
04
65
0-
0
-0
04
Figure 21. Propagation Delay Dispersion
COMPARATOR HYSTERESIS
The addition of hysteresis to a comparator is often useful in a
noisy environment, or where it is not desirable for the compar-
ator to toggle between states when the input signal is at the
switching threshold. The transfer function for a comparator
with hysteresis is shown in Figure 22. If the input voltage
approaches the threshold from the negative direction, the
comparator switches from 0 to 1 when the input crosses +VH/2.
The new switching threshold becomes VH/2. The comparator
remains in a 1 state until the threshold VH/2 is crossed while
coming from the positive direction. In this manner, noise
centered on 0 V input does not cause the comparator to switch
states unless it exceeds the region bounded by ±VH/2.
The customary technique for introducing hysteresis into a
comparator uses positive feedback from the output back to the
input. A limitation of this approach is that the amount of
hysteresis varies with the output logic levels, resulting in
hysteresis that can be load dependent and is not symmetrical
about the threshold. The external feedback network can also
introduce significant parasitics, which reduce high speed
performance and can induce oscillation in some cases.
In the ADCMP564, hysteresis is generated through the
programmable hysteresis pin. A resistor from the HYS pin to
GND creates a current into the part that is used to generate
hysteresis. Hysteresis generated in this manner is independent
of output swing and is symmetrical around the trip point. The
hysteresis vs. resistance curve is shown in Figure 23.
A current may be sourced into the HYS pin. The pin is biased
approximately 1 V below AGND and has a 3 kΩ series
resistance. The relationship between the current applied to the
HYS pin and the resulting hysteresis is shown in Figure 19.
OUTPUT
INPUT
0
1
0V
–VH
2
+VH
2
04650-0-005
Figure 22. Comparator Hysteresis Transfer Function
160
140
120
100
80
60
40
20
0
50
0
10
20
30
40
04650-0-021
RHYS (kΩ)
PR
OGR
A
M
ED
H
YSTER
ESIS
(
m
V)
Figure 23. Comparator Hysteresis vs. RHYS
MINIMUM INPUT SLEW RATE REQUIREMENT
As for all high speed comparators, a minimum slew rate must
be met to ensure that the device does not oscillate as the input
crosses the threshold. This oscillation is due in part to the high
input bandwidth of the comparator and the parasitics of the
package. ADI recommends a slew rate of 1 V/μs or faster to
ensure a clean output transition. If slew rates less than 1 V/μs
are used, hysteresis can be added to prevent the oscillation.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADCMP564 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual High Speed ECL Comparators |
| ADCMP564BRQ | 功能描述:IC COMPARATOR ECL DUAL HS 20QSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| ADCMP564BRQZ | 功能描述:IC COMPARATOR ECL DUAL HS 20QSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，開路集電極，TTL 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:7mV @ 5V 電流 - 輸入偏壓（最小值）:0.25µA @ 5V 電流 - 輸出（標(biāo)準(zhǔn)）:84mA @ 5V 電流 - 靜態(tài)（最大值）:120µA CMRR, PSRR（標(biāo)準(zhǔn)）:- 傳輸延遲（最大）:600ns 磁滯:- 工作溫度:-40°C ~ 85°C 封裝/外殼:SC-74A，SOT-753 安裝類型:表面貼裝 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1268 (CN2011-ZH PDF) 其它名稱:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| ADCMP565 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Ultrafast Voltage Comparator |
| ADCMP565BP | 功能描述:IC COMP DUAL ULTRA-FAST 20-PLCC RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
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