參數(shù)資料
型號： ADC1415S105HN
廠商： NXP Semiconductors N.V.
元件分類： 外設(shè)及接口
英文描述： Single 14-bit ADC 105 Msps with Input Buffer CMOS or LVDS DDR digital outputs
封裝： ADC1415S105HN/C1<SOT618-6 (HVQFN40)|<<http://www.nxp.com/packages/SOT618-6.html<1<Always Pb-free,;ADC1415S105HN/C1<SOT618-6 (HVQFN40)|<<http://www.nxp.com/packages/SOT618
文件頁數(shù)： 27/42頁
文件大?。?/td> 293K
代理商： ADC1415S105HN
ADC1415S_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 17 December 2010
27 of 42
NXP Semiconductors
ADC1415S series
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
11.5.3
DAta Valid (DAV) output clock
A data valid output clock signal (DAV) is provided that can be used to capture the data
delivered by the ADC1415S. Detailed timing diagrams for CMOS and LVDS DDR modes
are provided in
Figure 4
and
Figure 5
respectively.
11.5.4
Out-of-Range (OTR)
An out-of-range signal is provided on pin OTR. The latency of OTR is fourteen clock
cycles. The OTR response can be speeded up by enabling Fast OTR (bit
FASTOTR = logic 1; see
Table 29
). In this mode, the latency of OTR is reduced to only
four clock cycles. The Fast OTR detection threshold (below full-scale) can be
programmed via bits FASTOTR_DET[2:0].
Table 14.
FASTOTR_DET[2:0]
000
001
010
11.5.5
Digital offset
By default, the ADC1415S delivers output code that corresponds to the analog input.
However it is possible to add a digital offset to the output code via the SPI (bits
DIG_OFFSET[5:0]; see
Table 25
).
11.5.6
Test patterns
For test purposes, the ADC1415S can be configured to transmit one of a number of
predefined test patterns (via bits TESTPAT_SEL[2:0]; see
Table 26
). A custom test pattern
can be defined by the user (TESTPAT_USER; see
Table 27
and
Table 28
) and is selected
when TESTPAT_SEL[2:0] = 101. The selected test pattern is transmitted regardless of the
analog input.
101
110
111
100
81
60
Table 13.
LVDS_INT_TER[2:0]
LVDS DDR output register 2
…continued
Resistor value (
Ω
)
Fast OTR register
Detection level (dB)
20.56
16.12
11.02
7.82
5.49
3.66
2.14
0.86
011
100
101
110
111
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADC1415S105HN,518 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SNGL 14b ADC 105MSPS WITH INPUT BUFFER RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1415S105HN/C1,5 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SGL 14b ADC 105 MSPS INPUT BUFFER RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1415S105HN-C1 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1415S105HN-C18 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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