參數(shù)資料
型號： ADC1415S065F1
廠商： NXP Semiconductors N.V.
中文描述： Demoboard description Demo box content USB cable, power supply adapter, CDROM (SPI software, datasheets, PCB layout-schematics, Quickstart guide) Extension module Data Acquisition for ADC (HSDC-EXTMOD01-DB) with CMOS outputs mode (HSDC-ACC05-DB) Data Acquisition for ADC with CMOS outputs mode (HSDC-EXTMOD01-DB), ADC1x15SF1 Demo Board photo,
文件頁數(shù)： 26/28頁
文件大?。?/td> 3948K
代理商： ADC1415S065F1
NXP Semiconductors
Quick start ADC1415S, ADC1215S, ADC1115S, ADC1015S series (F1
or F2 versions)
Quick start
NXP B.V. 2011. All rights reserved.
Quick start
Rev. 5 — January 2011
26 of 28
N
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F
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4.
Appendix A.1: coherency calculation
The coherency relies on the fact that clock and analog input signal are synchronized and the first
and last samples being captured are adjoining samples: it ensures a continuous digitized time
process for the FFT processing.
To achieve this, one has to
follow the equation:
Where M is an odd integer equal to the number of periods being acquired and N the number of
samples acquired.
With Fin, Fs and N known, M has to be chosen such that it follows the equation above. To do this
iterative calculation, one has to decide whether Fin or Fs is fixed.
To illustrate this process, let’s consider our current example with Fin = 5 MHz, Fs = 122.88Msps
and N = 65536 samples acquired:
if Fin is fixed, this leads to M = 2667 periods of input signal to be acquired and a real sampling
frequency to be Fs = 122.864642 MHz;
If Fs is fixed, this leads to M = 2667 periods of input signal to be acquired and a real input
frequency to be Fin = 5.000625 MHz.
Those values needs to be programmed in the signal generator and clock generator before capture
is done, otherwise the FFT calculation will lead to a non-coherent result as shown below:
Fig 19. SW_ADC_1_r02: “Acquisition” page, non-coherent capture example
The numbers given for SNR, SFDR are completely wrong if coherency is not respected.
相關PDF資料
PDF描述
ADC1415S065HN Single 14-bit ADC 65 Msps with Input Buffer CMOS or LVDS DDR digital outputs
ADC1415S065HN Single 14-bit ADC 65 Msps with Input Buffer CMOS or LVDS DDR digital outputs
ADC1415S080HN ADC1415S080 - Single 14-bit ADC 80 Msps with Input Buffer CMOS or LVDS DDR digital outputs
ADC1415S105HN Single 14-bit ADC 105 Msps with Input Buffer CMOS or LVDS DDR digital outputs
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相關代理商/技術參數(shù)
參數(shù)描述
ADC1415S065F1/DB,598 功能描述:數(shù)據(jù)轉換 IC 開發(fā)工具 ADC DEMO BOARD RoHS:否 制造商:Texas Instruments 產品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
ADC1415S065F1-DB 功能描述:ADC1415S065 - 14 Bit 65M Samples per Second Analog to Digital Converter (ADC) Evaluation Board 制造商:idt, integrated device technology inc 系列:- 零件狀態(tài):過期 A/D 轉換器數(shù):1 位數(shù):14 采樣率（每秒）:65M 數(shù)據(jù)接口:并聯(lián)，串行，SPI 輸入范圍:2 Vpp 不同條件下的功率（典型值）:580mW @ 65MSPS 使用的 IC/零件:ADC1415S065 所含物品:板 標準包裝:1
ADC1415S065F2/DB,598 功能描述:數(shù)據(jù)轉換 IC 開發(fā)工具 ADC DEMO BOARD RoHS:否 制造商:Texas Instruments 產品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
ADC1415S065F2-DB 功能描述:ADC1415S065 - 14 Bit 65M Samples per Second Analog to Digital Converter (ADC) Evaluation Board 制造商:idt, integrated device technology inc 系列:- 零件狀態(tài):過期 A/D 轉換器數(shù):1 位數(shù):14 采樣率（每秒）:65M 數(shù)據(jù)接口:并聯(lián)，串行，SPI 輸入范圍:2 Vpp 不同條件下的功率（典型值）:580mW @ 65MSPS 使用的 IC/零件:ADC1415S065 所含物品:板 標準包裝:1
ADC1415S065HN,518 功能描述:模數(shù)轉換器 - ADC SNGLE 14b ADC 65MSPS WITH INPUT BUFFER RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
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