參數(shù)資料
型號: ADC0804S030TS
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Single 8-bit ADC up to 30 Msps
封裝: ADC0804S030TS/C1<SOT341-1 (SSOP28)|<<http://www.nxp.com/packages/SOT341-1.html<1<Always Pb-free,;ADC0804S030TS/C1<SOT341-1 (SSOP28)|<<http://www.nxp.com/packages/SOT341-1
文件頁數(shù): 10/19頁
文件大?。?/td> 133K
代理商: ADC0804S030TS
ADC0804S030_040_050_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 14 August 2008
10 of 19
NXP Semiconductors
ADC0804S030/040/050
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
[7]
Effective bits are obtained via a Fast Fourier transform (FFT) treatment taking 8000 acquisition points per equivalent fundamental
period. The calculation takes into account all harmonics and noise up to half the clock frequency (Nyquist frequency). Conversion to
SIgnal-to-Noise-And-Distortion (SINAD) ratio: SINAD = ENOB
×
6.02 + 1.76 dB.
[8]
Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two input signals have
the same amplitude and the total amplitude of both signals provides full-scale to the converter.
[9]
Measurement carried out using video analyzer VM700A, where the video analog signal is reconstructed through a digital-to-analog
converter.
[10] Output data acquisition: the output data is available after the maximum delay time of t
d(0)
. For 50 MHz version NXP recommend the
lowest possible output load.
11. Additional information relating to
Table 6
Fig 3.
Explanation of
Table 6 Table note 3
014aaa555
RT
RB
RM
R
lad
ROT
RL
RL
RL
RL
IL
ROB
code
255
code
0
Table 7.
Output coding and input voltage (typical values; referenced to AGND, V
RB
= 1.3 V,
V
RT
= 3.67 V)
V
i(a)(p-p)
(V)
< 1.475
0
0000 0000
1.475
1
0000 0000
-
1
0000 0001
-
-
1
1111 1110
3.495
1
1111 1111
> 3.495
0
1111 1111
Code
IR
Binary outputs D7 to D0
Two’s complement
outputs D7 to D0
10 0000 00
10 0000 00
10 0000 01
01 1111 10
01 1111 11
01 1111 11
Underflow
0
1
254
255
Overflow
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