參數(shù)資料
型號: ADAU1701JSTZ
廠商: ANALOG DEVICES INC
元件分類: 消費(fèi)家電
英文描述: SigmaDSP 28/56-Bit Audio Processor with 2ADC/4DAC
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: ROHS COMPLIANT, PLASTIC, MS-026BBC, LQFP-48
文件頁數(shù): 24/43頁
文件大?。?/td> 625K
代理商: ADAU1701JSTZ
ADAU1701
Preliminary Technical Data
DSP Core Control Register. The parameter settings that should
be saved are configured in SigmaStudio.
Rev. PrF | Page 24 of 43
The writeback functions by writing data from the ADAU1701’s
interface registers to the second page of the selfboot EEPROM,
addresses 32-63. Starting at EEPROM address 26 (so that the
interface register data begins at address 32), the EEPROM
should be programmed with six bytes - the Message Byte
(0x01), 2 length bytes, the chip address (0x00), the 2-byte
subaddress for the interface registers (0x08 0x00). There must
be a message to the DSP core control register to enable port
writing to the interface registers prior to the interface register
data in the EEPROM. This should be stored in EEPROM
address 0. No-op messages (0x03) may be used in-between
messages to ensure that these conditions are met.
Table 20 shows an example of what should be stored in the
EEPROM starting with EEPROM address 0. In this example,
the interface registers are first set to control port write mode
(line 1), which is followed by 18 no-op bytes (lines 2-4) so that
the interface register data will appear on page 2 of the
Table 20. EEPROM Writeback Example
0x01
0x00
Write
Length
EEPROM. Next follows the write header (line 4) and then 32
bytes of interface register data (lines 5-8). Finally, the program
RAM data, starting at ADAU1701 address 0x04 0x00 is written
(lines 9-11). In this example, the program length is 70 words, or
350 bytes, so 332 more bytes will be included in the EEPROM
but are not shown here.
The ADAU1701 writes to EEPROM chip address 0x60. The
LSBs of the addresses of some EEPROMs are pin-configurable;
in most cases these pins should be tied low to set the address
shown here.
The maximum number of bytes that will be written back from
the ADAU1701 is 35 (eight 4-byte Interface registers plus 3
bytes of EEPROM addressing overhead). With SCL running at
384 kHz, this means that the writeback operation will take
approximately 73 μs to complete after being triggered. Care
should be taken to ensure that sufficient power is available to
the system for enough time to allow a writeback to complete,
especially if the WB signal is triggered from a falling power
supply voltage.
0x05
0x00
0x08
0x1C
0x00
Core Control Register Data
0x40
Device Addr.
Core Control Register address
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
No-Op bytes
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
No-Op bytes
0x03
0x03
0x01
Write
0x00
0x23
0x00
0x08
Interface Register Address
0x00
No-Op bytes
Length
Device Addr.
0x00
0x00
0x00
0x00
Interface Register Data
0x00
Interface Register Data
0x00
Interface Register Data
0x00
Interface Register Data
0x00
Device Addr.
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x01
Write
0x01
0x61
0x04
Program RAM address
0x00
0x00
Program RAM data
0x00
Length
0x00
0x00
0x01
0x00
Program RAM data
0x00
0x00
0x00
0xE8
0x01
0x00
0x00
0x00
0x01
0x00
0x08
0x00
Program RAM data (continues for 332 more bytes)
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