參數(shù)資料
型號(hào): ADA4858-3ACP-EBZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 5/20頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL FOR ADA4858-3ACP
標(biāo)準(zhǔn)包裝: 1
每 IC 通道數(shù): 3 - 三
放大器類(lèi)型: 電流反饋
板類(lèi)型: 裸(未填充)
已供物品:
已用 IC / 零件: 16-LFCSP 封裝
Data Sheet
ADA4858-3
Rev. B | Page 13 of 20
THEORY OF OPERATION
OVERVIEW
The ADA4858-3 is a current feedback amplifier designed for
exceptional performance as a triple amplifier with a variable
gain capability. Its specifications make it especially suitable
for SD and HD video applications. The ADA4858-3 provides
HD video output on a single supply as low as 3.0 V while only
consuming 13 mA per amplifier. It also features a power-down
pin (PD) that reduces the total quiescent current to 2 mA when
activated.
The ADA4858-3 can be used in applications that require both
ac- and dc-coupled inputs and outputs. The output stage on the
ADA4858-3 is capable of driving 2 V p-p video signals into two
doubly terminated video loads (150 each) on a single 5 V supply.
The input range of the ADA4858-3 includes ground, and the
output range is limited by the output headroom set by the voltage
drop across the two diodes from each rail, which occurs 1.2 V
from the positive supply and the charge pump negative supply rails.
CHARGE PUMP OPERATION
The on-board charge pump creates a negative supply for the
amplifier. It provides different negative voltages depending on
the power supply voltage. For a +5 V supply, the negative supply
generated is equal to 3 V with 150 mA of output supply current,
and for a +3.3 V supply, the negative supply is equal to 2 V
with 45 mA of output supply current.
Figure 36 shows the charging cycle when the supply voltage +VS
charges C1 through Φ1 to ground. During this cycle, C1 quickly
charges to reach the +VS voltage. The discharge cycle then begins
with switching Φ1 off and switching Φ2 on, as shown in Figure 37.
When C1 = C2, the charge in C1 is divided between the two
capacitors and slowly increases the voltage in C2 until it reaches
a predetermined voltage (3 V for +5 V supply and 2 V for
+3.3 V supply). The typical charge pump charging and discharging
frequency is 550 kHz with a 150 load and no input signal;
however, this frequency changes with different loads and supply
conditions.
07714-
137
+VS
CPO
C2
C1
Φ1
a
b
Figure 36. C1 Charging Cycle
07714-
138
+VS
CPO
C2
C1
Φ2
a
b
Figure 37. C1 Discharging Cycle
The ADA4858-3 specifications make it especially suitable for SD
and HD video applications. It also allows dc-coupled video signals
with its black level set to 0 V and its sync tip at 300 mV for
YPbPr video.
The charge pump is always on, even when the power-down pin
(PD) is enabled and the amplifiers are off. However, if a negative
current is not used, the charge pump is in an idle state. Each
amplifier needs 6.3 mA of current, which totals 19 mA for all
three amplifiers. This means additional negative current may be
available by the charge pump for external use. Pin 4 (CPO) is
the charge pump output that provides access to the negative
supply generated by the charge pump.
If the negative supply is used to power another device in the
system, it is only possible for the 5 V supply operation. In the
3.3 V supply operation, the charge pump output current is very
limited. The capacitor C2 placed at the CPO pin, which
regulates the ripple of the negative voltage, can be used as a
coupling capacitor for the external device. However, the charge
pump current should be limited to a maximum of 50 mA for
external use. When powering down the ADA4858-3, the charge
pump is not affected and its output voltage and current are still
available for external use.
It is recommended to use 1 F low ESR and low ESL capacitors
for C1 and C2. These capactiors should be placed very close to
the part. C1 should be placed between Pin C1_a and Pin C1_b,
and C2 should be placed between Pin CPO and ground. If the
charge pump ripple at the CPO pin is too high, larger capacitors
(that is, 4.7 F) can replace the 1 F at C1 and C2.
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