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| 型號： | AD9956/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD9956 |
| 產(chǎn)品培訓模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標準包裝： | 1 |
| 系列： | AgileRF™ |
| 主要目的： | 計時，直接數(shù)字合成（DDS） |
| 已用 IC / 零件： | AD9956 |
| 已供物品： | 板 |
| 相關產(chǎn)品： | AD9956YCPZ-ND - IC SYNTHESIZER 1.8V 48LFCSP AD9956YCPZ-REEL7-ND - IC SYNTHESIZER 1.8V 48LFCSP |
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AD9956
Rev. A | Page 19 of 32
CML DRIVER
For clocking applications, an on-chip current mode logic
(CML) driver is included. This CML driver generates very low
jitter clock edges. The outputs of the CML driver are current
outputs and drives PECL levels when terminated into a 100
load. The base output current of the driver is programmed by
attaching a resistor from the DRV_RSET pin to ground (nomi-
nally 4.02 k for a continuous current of 7.2 mA). An optional
on-chip current programming resistor is enabled by setting a bit
in the control register. The rising edge and falling edge slew
rates are independently programmable to help control over-
shoot and ringing through the application of surge current
during rising edge transitions and falling edge transitions (see
Figure 27). There is a default surge current of 7.6 mA on the
rising edge and 4.05 mA on the falling edge. Bits in the control
register enable additional rising edge and falling edge surge
current, as well disable the default surge current (see the
Control Function Register Descriptions section for details). The
CML driver can be driven by the
RF divider input
RF divider output
PLLOSC input
I(t)
t
~250ps
RISING EDGE SURGE
CONTINUOUS
FALLING EDGE SURGE
CONTINUOUS
04806-0-002
Figure 27. Rising Edge and Falling Edge Surge Current Output of the
CML Clock Driver, as Opposed to the Steady State Continuous Current
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9956-VCO/PCB | 制造商:Analog Devices 功能描述:EVAL BD FOR AD9956, 2.7 GHZ DDS-BASED AGILERF SYNTHESIZER - Trays 制造商:Analog Devices 功能描述:EVAL CARD ((NS)) |
| AD9956-VCO/PCBZ | 功能描述:BOARD EVAL 14BIT 1.8V 48LFCSP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:AgileRF™ 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9956XCPZ | 制造商:Analog Devices 功能描述:DGTL SYNTHESIZER 48LFCSP EP - Tape and Reel |
| AD9956YCP | 制造商:Analog Devices 功能描述:- Trays |
| AD9956YCPZ | 功能描述:IC SYNTHESIZER 1.8V 48LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標準包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
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