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參數(shù)資料
| 型號： | AD9888KS-170 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | TRI N RECP M FLG 2-13 |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | PLASTIC, MQFP-128 |
| 文件頁數(shù)： | 8/32頁 |
| 文件大?。?/td> | 249K |
| 代理商： | AD9888KS-170 |
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REV. A
AD9888
–8–
PIN FUNCTION DESCRIPTIONS (continued)
Pin
Description
FILT
External Filter Connection
For proper operation, the pixel clock generator PLL requires an external filter. Connect the filter shown in Figure 6 to this
pin. For optimal performance, minimize noise and parasitics on this node.
Power Supply
V
D
Main Power Supply
These pins supply power to the main elements of the circuit. It should be as quiet and filtered as possible.
Digital Output Power Supply
A large number of output pins (up to 52) switching at high speed (up to 110 MHz) generates a lot of power supply
transients (noise). These supply pins are identified separately from the V
D
pins, so special care can be taken to mini-
mize output noise transferred into the sensitive analog circuitry. If the AD9888 is interfacing with lower voltage logic,
V
DD
may be connected to a lower supply voltage (as low as 2.5 V) for compatibility.
Clock Generator Power Supply
The most sensitive portion of the AD9888 is the clock generation circuitry. These pins provide power to the clock PLL
and help the user design for optimal performance. The designer should provide “quiet,” noise-free power to these pins.
Ground
The ground return for all circuitry on chip. It is recommended that the AD9888 be assembled on a single solid ground plane,
with careful attention to ground current paths.
Serial Port (2-Wire)
SDA
Serial Port Data I/O
SCL
ISerial Port Data Clock
A0
Serial Port Address Input 1
V
DD
PV
D
GND
For a full description of the 2-wire serial register and how it works, refer to the Control Register section.
DESIGN GUIDE
General Description
The AD9888 is a fully integrated solution for capturing analog
RGB signals and digitizing them for display on flat panel monitors
or projectors. The circuit is ideal for providing a computer inter-
face for HDTV monitors or as the front-end to high-performance
video scan converters.
Implemented in a high-performance CMOS process, the inter-
face can capture signals with pixel rates of up to 205 MHz, and
with an Alternate Pixel Sampling mode, up to 340 MHz.
The AD9888 includes all necessary input buffering, signal dc
restoration (clamping), offset and gain (brightness and contrast)
adjustment, pixel clock generation, sampling phase control, and
output data formatting. All controls are programmable via a
2-wire serial interface. Full integration of these sensitive analog
functions makes system design straightforward and less sensitive
to the physical and electrical environment.
With a typical power dissipation of only 650 mW and an operat-
ing temperature range of 0
°
C to 70
°
C, the device requires no
special environmental considerations.
Input Signal Handling
The AD9888 has six high-impedance analog input pins for the
red, green, and blue channels. They will accommodate signals
ranging from 0.5 V to 1.0 V p-p.
Signals are typically brought onto the interface board via a DVI-I
connector, a 15-pin D connector, or via BNC connectors. The
AD9888 should be located as close as practical to the input
connector. Signals should be routed via matched-impedance
traces (normally 75
) to the IC input pins.
At that point, the signal should be resistively terminated (to the
signal ground return) and capacitively coupled to the AD9888
inputs through 47 nF capacitors. These capacitors form part of
the dc restoration circuit.
In an ideal world of perfectly matched impedances, the best
performance can be obtained with the widest possible signal
bandwidth. The ultrawide bandwidth inputs of the AD9888
(500 MHz) can track the input signal continuously as it moves
from one pixel level to the next, and digitize the pixel during
a long, flat pixel time. In many systems, however, there are
mismatches, reflections, and noise, which can result in excessive
ringing and distortion of the input waveform. This makes it
more difficult to establish a sampling phase that provides good
image quality. The AD9888 can digitize graphics signals over a
very wide range of frequencies (10 MHz to 205 MHz). Often
characteristics that are beneficial at one frequency can be detri-
mental at another. Analog bandwidth is one such characteristic.
For UXGA resolutions (up to 205 MHz), a very high analog
bandwidth is desirable because of the fast input signal slew
rates. For VGA and lower resolutions (down to 12.5 MHz), a
very high bandwidth is not desirable, because it allows excess
noise to pass through. To accommodate these varying needs,
the AD9888 includes variable analog bandwidth control.
Four settings are available (75 MHz, 150 MHz, 300 MHz,
and 500 MHz), allowing the analog bandwidth to be matched
with the resolution of the incoming graphics signal.
R
AIN
G
AIN
B
AIN
75
RGB
INPUT
47nF
Figure 1. Analog Input Interface Circuit
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9888KS-205 | 制造商:Analog Devices 功能描述:ADC Triple 205Msps 8-bit Parallel 128-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:205MHZ ANALOG GRAPHICS INTERFACE CHIP - Bulk 制造商:Analog Devices 功能描述:IC INTERFACE GRAPHIC |
| AD9888KSZ-100 | 功能描述:IC FLAT PANEL INTERFACE 128-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標準包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD9888KSZ-140 | 功能描述:IC FLAT PANEL INTERFACE 128-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標準包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD9888KSZ-140 | 制造商:Analog Devices 功能描述:IC ANALOG INTERFACE |
| AD9888KSZ-170 | 功能描述:IC ANALOG INTRFC 170MSPS 128MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標準包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
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